Source/drain technologies for the scaling of nanoscale CMOS device

Solid State Sciences

Volumn 13, Issue 2, 2011, Pages 294-305

  Song, Yi ^a   Zhou, Huajie ^a   Xu, Qiuxia ^a  

^a INSTITUTE OF MICROELECTRONICS   (China)

Author keywords

Nanoscale CMOS device; Raised source drain; Schottky barrier source drain; Ultra shallow junction

Indexed keywords

LITHOGRAPHY; NANOTECHNOLOGY; SCHOTTKY BARRIER DIODES; SEMICONDUCTOR DEVICE MANUFACTURE; SEMICONDUCTOR DOPING; SEMICONDUCTOR JUNCTIONS;

CONCENTRATION PROFILES; INTERNATIONAL TECHNOLOGY ROADMAP FOR SEMICONDUCTORS; NANOSCALE CMOS DEVICES; RAISED SOURCE/DRAIN; SCHOTTKY BARRIER METALS; SCHOTTKY BARRIERS; SEMICONDUCTOR INDUSTRY; ULTRA SHALLOW JUNCTION;

CMOS INTEGRATED CIRCUITS;

EID: 79251617242     PISSN: 12932558     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.solidstatesciences.2010.12.002     Document Type: Review

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