Low-cost and highly manufacturable strained-Si channel technique for strong hole mobility enhancement on 35-nm gate length pMOSFETs

IEEE Transactions on Electron Devices

Volumn 54, Issue 6, 2007, Pages 1394-1401

  Xu, Qiuxia ^a   Duan, Xiaofeng ^b   Liu, Haihua ^b   Han, Zhengsheng ^a   Ye, Tianchun ^a  

^a INSTITUTE OF MICROELECTRONICS   (China)

^b INSTITUTE OF PHYSICS   (China)

Author keywords

Compressive stress; Ge preamorphization implantation (PAI); Hole mobility enhancement; Source drain (S D) extension; Strained silicon channel pMOSFETs

Indexed keywords

COMPRESSIVE STRESS; DIFFRACTION; ELECTRON MOBILITY; HOLE MOBILITY; RESIDUAL STRESSES; SEMICONDUCTING GERMANIUM; SEMICONDUCTING SILICON; SHEAR STRAIN;

RESIDUAL COMPRESSIVE STRAIN; STRAINED-SILICON CHANNEL PMOSFETS;

MOSFET DEVICES;

EID: 34249935767     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2007.895871     Document Type: Article

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