Compact-modeling solutions for nanoscale double-gate and gate-all-around MOSFETs

IEEE Transactions on Electron Devices

Volumn 53, Issue 9, 2006, Pages 2128-2141

  Iñiguez, Benjamín ^a,b   Fjeldly, Tor A ^a,c   Lázaro, Antonio ^b   Danneville, François ^a,d   Deen, M Jamal ^a,e  

^a IEEE   (Canada)

^b UNIVERSITAT ROVIRA I VIRGILI   (Spain)

^c UNIVERSITY OF OSLO   (Norway)

^d INSTITUT D ELECTRONIQUE   (France)

^e MCMASTER UNIVERSITY   (Canada)

Author keywords

Device modeling; Double gate (DG) devices; Gate all around (GAA) devices; High frequency; Nanoscale MOSFETs; Noise

Indexed keywords

DEVICE MODELING; DOUBLE-GATE (DG) DEVICES; GATE ALL AROUND (GAA) DEVICES; NANOSCALE MOSFET DEVICES;

CIRCUIT SIMULATION; ELECTROSTATICS; GATES (TRANSISTOR); POISSON EQUATION; SEMICONDUCTOR DEVICE MODELS; SEMICONDUCTOR DOPING; SPURIOUS SIGNAL NOISE;

MOSFET DEVICES;

EID: 33750509779     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2006.881007     Document Type: Article

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