메뉴 건너뛰기




Volumn 5844, Issue , 2005, Pages 185-199

High frequency noise of SOI MOSFETs: Performances and limitations

Author keywords

[No Author keywords available]

Indexed keywords

DIFFUSION; ELECTRIC CURRENTS; MOSFET DEVICES;

EID: 28444496697     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.609669     Document Type: Conference Paper
Times cited : (11)

References (33)
  • 2
    • 4344651640 scopus 로고    scopus 로고
    • Noise investigations of 90 nm VLSI technologies for analog integrated circuits at millimeter wave frequencies
    • Ellinger F., Schmatz M., Jäckel, Noise Investigations of 90 nm VLSI Technologies for Analog Integrated Circuits at Millimeter Wave Frequencies, in Proc. of SPIE, Noise in Devices and Circuits, Vol. 5470, pp; 131-140.
    • Proc. of SPIE, Noise in Devices and Circuits , vol.5470 , pp. 131-140
    • Ellinger, F.1    Schmatz, M.2    Jäckel3
  • 3
    • 1642365005 scopus 로고    scopus 로고
    • 26-42 GHz SOI CMOS low noise amplifier
    • March
    • Ellinger F., 26-42 GHz SOI CMOS Low Noise Amplifier, IEEE Journal of Solid-State Circuits, Vol. 39, n. 3, March 2004
    • (2004) IEEE Journal of Solid-state Circuits , vol.39 , Issue.3
    • Ellinger, F.1
  • 4
    • 0033169525 scopus 로고    scopus 로고
    • AC floating body effects and the resultant analog circuit issues in submicron floating body and body-grounded SOI MOSFET's
    • august
    • Y-C Tseng, W. M. Huang, D. J. Monk, P. Welch, J. M. Ford, and J. C. S. Woo, AC Floating Body Effects and the Resultant Analog Circuit Issues in Submicron Floating Body and Body-Grounded SOI MOSFET's, IEEE Tran. Elect.Dev., Vol. 46, n. 8, august 1999
    • IEEE Tran. Elect.Dev. , vol.46 , Issue.8 , pp. 1999
    • Tseng, Y.-C.1    Huang, W.M.2    Monk, D.J.3    Welch, P.4    Ford, J.M.5    Woo, J.C.S.6
  • 5
    • 0002082142 scopus 로고    scopus 로고
    • Phase noise characteristics associated with low-frequency noise in submicron SOI MOSFET feedback oscillator for RF IC's
    • January
    • Y-C Tseng, W. M. Huang, E. Spears, D. Spooner, D Ngo, J. M. Ford, and J. C. S. Woo, Phase Noise Characteristics Associated with Low-Frequency Noise in Submicron SOI MOSFET Feedback Oscillator for RF IC's, IEEE Electron Device Letters, Vol. 20, n. 1, January 1999
    • IEEE Electron Device Letters , vol.20 , Issue.1 , pp. 1999
    • Tseng, Y.-C.1    Huang, W.M.2    Spears, E.3    Spooner, D.4    Ngo, D.5    Ford, J.M.6    Woo, J.C.S.7
  • 6
    • 0036160849 scopus 로고    scopus 로고
    • High-performance fully-depleted SOI RF CMOS
    • Jan.
    • C. L. Chen et al., High-performance fully-depleted SOI RF CMOS, IEEE Electron Device Lett., 24: 52-54, Jan. 2002.
    • (2002) IEEE Electron Device Lett. , vol.24 , pp. 52-54
    • Chen, C.L.1
  • 7
    • 0034790451 scopus 로고    scopus 로고
    • A 0.13-μm SOI CMOS technology for low-power digital and RF applications
    • N. Zamdmer et al., A 0.13-μm SOI CMOS technology for low-power digital and RF applications, VLSI Symp. Tech. Dig., 85-86, 2001.
    • (2001) VLSI Symp. Tech. Dig. , pp. 85-86
    • Zamdmer, N.1
  • 8
    • 4544385361 scopus 로고    scopus 로고
    • A comparison of state-of-the-art NMOS and SiGe HBT devices for analog/mixed-signal/RF circuit applications
    • Kuhn et al., A Comparison of State-of-the-Art NMOS and SiGe HBT Devices for Analog/Mixed-signal/RF Circuit Applications, VLSI Symp. Tech. Dig., 224-225, 2004.
    • (2004) VLSI Symp. Tech. Dig. , pp. 224-225
    • Kuhn1
  • 10
    • 18144443346 scopus 로고    scopus 로고
    • 70 nm SOI CMOS of 135 GHz fmax with dual offset-implanted source-drain extension structure for RF/analog and logic applications
    • T. Matsumoto et al., 70 nm SOI CMOS of 135 GHz fmax with dual offset-implanted source-drain extension structure for RF/analog and logic applications, IEDM Tech. Dig., 219-222, 2001.
    • (2001) IEDM Tech. Dig. , pp. 219-222
    • Matsumoto, T.1
  • 11
    • 0041608145 scopus 로고    scopus 로고
    • Suitability of scaled SOI CMOS for high-frequency analog circuits
    • N. Zamdmer et al., Suitability of scaled SOI CMOS for high-frequency analog circuits, Proc. ESSDERC, 2002.
    • (2002) Proc. ESSDERC
    • Zamdmer, N.1
  • 12
    • 0035714396 scopus 로고    scopus 로고
    • High performance sub-40 nm CMOS devices on SOI for 70 nm technology node
    • S. Narasimha et al., High performance sub-40 nm CMOS devices on SOI for 70 nm technology node, IEDM Tech. Dig., 625-627, 2001.
    • (2001) IEDM Tech. Dig. , pp. 625-627
    • Narasimha, S.1
  • 13
    • 0029322188 scopus 로고
    • Microwave performance of optically fabricated T-gate thin film silicon-on-sapphire based MOSFETs
    • June
    • P. R. de la Houssaye et al., Microwave performance of optically fabricated T-gate thin film silicon-on-sapphire based MOSFETs, IEEE Trans. Electron Devices, 16:289-292, June 1995.
    • (1995) IEEE Trans. Electron Devices , vol.16 , pp. 289-292
    • De La Houssaye, P.R.1
  • 14
    • 0034248273 scopus 로고    scopus 로고
    • High performance 0.1 μm gate-length P-type SiGe MOSFETs and MOS-MODFETs
    • Aug.
    • W. Lu et al., High performance 0.1 μm gate-length P-type SiGe MOSFETs and MOS-MODFETs, IEEE Trans. Electron Devices, 47: 1645-1652, Aug. 2000.
    • (2000) IEEE Trans. Electron Devices , vol.47 , pp. 1645-1652
    • Lu, W.1
  • 16
    • 0023844609 scopus 로고
    • Noise modeling and measurement techniques
    • A. Cappy, Noise Modeling and Measurement Techniques, IEEE MTT, Vol. 36, 1 (1988).
    • (1988) IEEE MTT , vol.36 , pp. 1
    • Cappy, A.1
  • 20
    • 0029306263 scopus 로고
    • Influence of the gate leakage current on the noise performance of MESFETs and MODFETs
    • May
    • F. Danneville, G. Dambrine, H. Happy, P. Tadyszak and A. Cappy, Influence of the gate leakage current on the noise performance of MESFETs and MODFETs, Solid-State Electronics, Vol. 38, n. 5, pp. 1081-1087, May 1995
    • (1995) Solid-State Electronics , vol.38 , Issue.5 , pp. 1081-1087
    • Danneville, F.1    Dambrine, G.2    Happy, H.3    Tadyszak, P.4    Cappy, A.5
  • 21
    • 0038394492 scopus 로고    scopus 로고
    • Analysis of gate shot noise in MOSFETs with ultrathin gate oxides
    • February
    • C. Fiegna, Analysis of Gate Shot Noise in MOSFETs With Ultrathin Gate Oxides, IEEE Electron Device Letters, Vol. 24, n. 2, February 2003.
    • IEEE Electron Device Letters , vol.24 , Issue.2 , pp. 2003
    • Fiegna, C.1
  • 23
    • 0030128119 scopus 로고    scopus 로고
    • A physically-based c∞-continuous fully-depleted SOI MOSFET model for analog applications
    • April
    • B. Iñíguez et al., A Physically-Based C∞-Continuous Fully-Depleted SOI MOSFET Model for Analog Applications, IEEE Transactions on Electron Devices, vol. 43, no. 4, pp. 568-575, April 1996.
    • (1996) IEEE Transactions on Electron Devices , vol.43 , Issue.4 , pp. 568-575
    • Iñíguez, B.1
  • 24
    • 0036498316 scopus 로고    scopus 로고
    • 0.25 μm fully depletd SOI MOSFETs for RF mixed analog-digital circuits, including a comparison with partially depleted devices with relation to high frequency noise parameters
    • March
    • M. Vanmackelberg et al, "0.25 μm fully depletd SOI MOSFETs for RF mixed analog-digital circuits, including a comparison with partially depleted devices with relation to high frequency noise parameters", Solid-State Electronics, vol. 46, pp. 379-386, March 2002.
    • (2002) Solid-state Electronics , vol.46 , pp. 379-386
    • Vanmackelberg, M.1
  • 25
    • 28444461631 scopus 로고    scopus 로고
    • http://www.oki.com/en/otr/196/downloads/otr-196-R15.pdf
  • 27
    • 0038821128 scopus 로고    scopus 로고
    • Simulation of thermal noise in scaled MOSFETs
    • June
    • S. Spedo, C. Fiegna, Simulation of Thermal Noise in Scaled MOSFETs, Fluctuation and Noise Letters, vol. 2, no. 2, June 2002.
    • (2002) Fluctuation and Noise Letters , vol.2 , Issue.2
    • Spedo, S.1    Fiegna, C.2
  • 28
    • 0014603115 scopus 로고
    • Noise in Junction- And MOS-FETs at high temperatures
    • November
    • A. Van Der Ziel, Noise in Junction- and MOS-FETs at high temperatures, Solid-State Electronics, vol. 12, no. 11, pp. 861-866, November 1969.
    • (1969) Solid-State Electronics , vol.12 , Issue.11 , pp. 861-866
    • Van Der Ziel, A.1
  • 32
    • 10844225390 scopus 로고    scopus 로고
    • Schottky-barrier source/drain MOSFETs on ultra-thin silicon-on-insulator body with a tungsten metallic midgap gate
    • Dec.
    • G. Larrieu, E. Dubois, Schottky-Barrier Source/Drain MOSFETs on Ultra-thin Silicon-on-Insulator body with a Tungsten Metallic Midgap Gate, IEEE Electron Device Letters, Vol. 25, n. 12, pp. 801-803, Dec. 2004.
    • (2004) IEEE Electron Device Letters , vol.25 , Issue.12 , pp. 801-803
    • Larrieu, G.1    Dubois, E.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.