Impact of downscaling on high-frequency noise performance of bulk and SOI MOSFETs

IEEE Transactions on Electron Devices

Volumn 51, Issue 10, 2004, Pages 1605-1612

  Pailloncy, Guillaume ^a   Raynaud, Christine ^b   Vanmackelberg, M ^a   Danneville, François ^a   Lepilliet, S ^a   Raskin, Jean Pierre ^c   Dambrine, Gilles ^a  

^a INSTITUT D ELECTRONIQUE   (France)

^b STMICROELECTRONICS   (France)

^c UNIVERSITÉ CATHOLIQUE DE LOUVAIN   (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; CIRCUIT OSCILLATIONS; ELECTRIC CONDUCTANCE; GATES (TRANSISTOR); OPTIMIZATION; SILICON ON INSULATOR TECHNOLOGY; SPURIOUS SIGNAL NOISE;

CHANNEL GATE; DOWNSCALING PROCESS; HIGH FREQUENCY NOISE; MICROWAVE PERFORMANCES; PROCESS OPTIMIZATION;

MOSFET DEVICES;

EID: 5444234970     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2004.834902     Document Type: Article

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