TSV manufacturing yield and hidden costs for 3D IC integration

Proceedings - Electronic Components and Technology Conference

Volumn , Issue , 2010, Pages 1031-1042

  Lau, John H ^a  

^a INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

3-D INTEGRATION; ACTIVE SURFACES; IC PACKAGING; MANUFACTURING YIELD; NEW CONCEPT; ROADMAP; THROUGH-SILICON-VIA;

THREE DIMENSIONAL;

INTEGRATION;

EID: 77955205984     PISSN: 05695503     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ECTC.2010.5490828     Document Type: Conference Paper

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