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Volumn , Issue , 2009, Pages 6-10

Study of 15μm pitch solder microbumps for 3D IC integration

Author keywords

[No Author keywords available]

Indexed keywords

3D STACKING TECHNOLOGY; ASSEMBLY PROCESS; BONDING CONDITIONS; CHIP ASSEMBLY; ELECTROLESS; FLIP-CHIP BONDERS; HIGH DENSITY; LOW COSTS; MICRO-BUMPS; SI CHIPS; ULTRA FINE PITCH; UNDER-BUMP METALLURGIES; UNDERFILL MATERIALS; UNDERFILL PROCESS; UNDERFILLING; VOID-FREE;

EID: 70349686526     PISSN: 05695503     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ECTC.2009.5073988     Document Type: Conference Paper
Times cited : (79)

References (10)
  • 1
    • 47349100893 scopus 로고    scopus 로고
    • Package technology to address the memory bandwidth challenge for tera-scale computing
    • L. A. Polka, H. Kalyanam, G. Hu, and S. Krishnamoorthy "Package Technology to Address the Memory Bandwidth Challenge for Tera-scale Computing, " Intel Technology Journal, Vol. 11, No. 3, 2007 pp.197-206.
    • (2007) Intel Technology Journal , vol.11 , Issue.3 , pp. 197-206
    • Polka, L.A.1    Kalyanam, H.2    Hu, G.3    Krishnamoorthy, S.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.