High aspect ratio TSV copper filling with different seed layers

Proceedings - Electronic Components and Technology Conference

Volumn , Issue , 2008, Pages 563-570

  Wolf, M Jürgen ^a   Dretschkow, Thomas ^c   Wunderle, Bernhard ^a   Jürgensen, Nils ^a   Engelmann, Gunter ^a   Ehrmann, Oswin ^a   Uhlig, Albrecht ^c   Michel, Bernd ^a   Reichl, Herbert ^b  

^a FRAUNHOFER IZM   (Germany)

^b TECHNISCHE UNIVERSITÄT BERLIN   (Germany)

^c ATOTECH DEUTSCHLAND GMBH   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

AGRICULTURAL PRODUCTS; COMPUTER NETWORKS; PHOTORESISTS; REDUCTION; SEED; SILICON;

ELECTRO-CHEMICAL DEPOSITION; ELECTRONIC COMPONENTS; SEED LAYERS;

ASPECT RATIO;

EID: 51349153510     PISSN: 05695503     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ECTC.2008.4550029     Document Type: Conference Paper

References (9)

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2. P. Ramm, J. Wolf, B. Wunderle: "Wafer-Level 3-D System Integration" (to be published in) "Handbook of 3D Integration", edited by P. Garrou, C. Bower and P. Ramm, Wiley-VCH, 2008, ISBN: 978-3-527-32034-9
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