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Volumn , Issue , 2008, Pages 387-392

Development of fine pitch solder microbumps for 3D chip stacking

Author keywords

[No Author keywords available]

Indexed keywords

BONDING; BRAZING; CHIP SCALE PACKAGES; NICKEL METALLURGY; SEMICONDUCTING SILICON COMPOUNDS; SILICON; SILICON WAFERS; TIN; WELDING;

EID: 63049114343     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/EPTC.2008.4763465     Document Type: Conference Paper
Times cited : (35)

References (9)
  • 1
    • 63049090961 scopus 로고    scopus 로고
    • Hu G., Kalyanam H., Krishnamoorthy and Polka L., Package Technology to Address the Memory Bandwidth Challenge for Tera-scale Computing, Intel Technology Journal, 11, No. 3 (2007), pp. 197-206
    • Hu G., Kalyanam H., Krishnamoorthy and Polka L., "Package Technology to Address the Memory Bandwidth Challenge for Tera-scale Computing," Intel Technology Journal, Vol. 11, No. 3 (2007), pp. 197-206
  • 2
    • 25844453501 scopus 로고    scopus 로고
    • Development of next-gereration system-on-acage (SOP) technology based on silicon carriers with fine-pitch interconnection
    • Knickerbocker, J. U. et al, "Development of next-gereration system-on-acage (SOP) technology based on silicon carriers with fine-pitch interconnection," IBM J. Res. Dev. Vol. 49, No. 4/5 (2005), pp. 725-754
    • (2005) IBM J. Res. Dev , vol.49 , Issue.4-5 , pp. 725-754
    • Knickerbocker, J.U.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.