Development of novel intermetallic joints using thin film indium based solder by low temperature bonding technology for 3D IC stacking

Proceedings - Electronic Components and Technology Conference

Volumn , Issue , 2009, Pages 333-338

  Choi, Won Kyoung ^a   Premachandran, C S ^a   Chiew, Ong Siong ^a   Ling, Xie ^a   Ebin, Liao ^a   Khairyanto, Ahmad ^a   Ratmin, Bin ^a   Chen Wei Sheng, Kelvin ^a   Thaw, Phyo Phyo ^a   Lau, John H ^b  

^a INSTITUTE OF MICROELECTRONICS   (Singapore)

^b HONG KONG UNIVERSITY OF SCIENCE AND TECHNOLOGY   (Hong Kong)

Author keywords

[No Author keywords available]

Indexed keywords

ANNEALING PROCESS; BONDING SHEAR; BONDING STRENGTH; CHIP-TO-CHIP STACKING; ELECTRICAL RESISTANCES; JOINT RELIABILITY; LOW TEMPERATURE BONDING; LOW TEMPERATURES; OPTIMAL CONDITIONS; PROCESS PARAMETERS; SCANNING ELECTRON MICROSCOPES; SOLDER BUMP; SOLDER JOINTS; TEM; THERMOMECHANICAL ANALYSIS;

DIES; DIFFERENTIAL SCANNING CALORIMETRY; DIFFUSION BONDING; ELECTRIC RESISTANCE; ELECTRON MICROSCOPES; INDIUM; MELTING POINT; SCANNING ELECTRON MICROSCOPY; SEMICONDUCTING INTERMETALLICS; SHEAR STRENGTH; TECHNOLOGY; THREE DIMENSIONAL;

BONDING;

EID: 70349693680     PISSN: 05695503     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ECTC.2009.5074036     Document Type: Conference Paper

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