메뉴 건너뛰기




Volumn , Issue , 2007, Pages 431-465

Three-Dimensional (3D) Integration

Author keywords

Deep submicron alignment and nanoimprint lithography; Face to face and face to back bonding; Wafer level processing

Indexed keywords


EID: 84885811039     PISSN: None     EISSN: None     Source Type: Book    
DOI: 10.1002/9780470180907.ch15     Document Type: Chapter
Times cited : (4)

References (115)
  • 3
    • 0036646445 scopus 로고    scopus 로고
    • Standardization of mobile phone positioning for 3G systems
    • July
    • Zhao Y. Standardization of mobile phone positioning for 3G systems. IEEE Communications Magazine;July 2002. p 108-116.
    • (2002) IEEE Communications Magazine , pp. 108-116
    • Zhao, Y.1
  • 5
    • 33947387064 scopus 로고    scopus 로고
    • SoC issues for RF smart dust
    • Cook B, Lanzisera S, Pister K, SoC issues for RF smart dust. Proc IEEE 2006;94 (6):1177-1196.
    • (2006) Proc IEEE , vol.94 , Issue.6 , pp. 1177-1196
    • Cook, B.1    Lanzisera, S.2    Pister, K.3
  • 7
    • 84889850234 scopus 로고    scopus 로고
    • http://www.internationalsensor.com
  • 8
    • 33644662195 scopus 로고    scopus 로고
    • The IC package: missing link between nanometer silicon and multi-gigabit PCB systems
    • Feb
    • Kuo A-Y, Mu Z. The IC package: missing link between nanometer silicon and multi-gigabit PCB systems. Advanced Packaging; Feb 2006. p 16-18.
    • (2006) Advanced Packaging , pp. 16-18
    • Kuo, A.-Y.1    Mu, Z.2
  • 9
    • 33644662194 scopus 로고    scopus 로고
    • 3-D-stacked ICs with copper nails allows system size reduction
    • Feb
    • Swinnen B, Beyne E. 3-D-stacked ICs with copper nails allows system size reduction. Advanced Packaging; Feb 2006. p 27-28.
    • (2006) Advanced Packaging , pp. 27-28
    • Swinnen, B.1    Beyne, E.2
  • 16
    • 0037738328 scopus 로고    scopus 로고
    • Advancements in stacked chip scale packaging (S-CSP), provides system-in-a-package functionality for wireless and handheld applications
    • Kada M, Smith L. Advancements in stacked chip scale packaging (S-CSP), provides system-in-a-package functionality for wireless and handheld applications. Proceedings of Pan Pacific Microelectronics Symposium Conference; 2000. p 1-7.
    • (2000) Proceedings of Pan Pacific Microelectronics Symposium Conference , pp. 1-7
    • Kada, M.1    Smith, L.2
  • 18
    • 0035437353 scopus 로고    scopus 로고
    • Packages go vertical
    • Goldstein H. Packages go vertical. IEEE Spectrum 2001;38(38):46-51.
    • (2001) IEEE Spectrum , vol.38 , Issue.38 , pp. 46-51
    • Goldstein, H.1
  • 19
    • 84889778309 scopus 로고    scopus 로고
    • http://www.valtronic.ch/home.html
  • 20
    • 70350369939 scopus 로고    scopus 로고
    • Miniaturized electronics: driving medical innovation
    • Medical Device & Diagnostic Industry, March
    • Pinkerton G. Miniaturized electronics: driving medical innovation. Medical Device & Diagnostic Industry, March 2003.
    • (2003)
    • Pinkerton, G.1
  • 21
    • 84889785002 scopus 로고    scopus 로고
    • http://www.tessera.com
  • 24
    • 33644527893 scopus 로고    scopus 로고
    • New 3-D chip interconnect technology
    • Singer P. New 3-D chip interconnect technology. Semiconductor Int 2005;28 (12):26.
    • (2005) Semiconductor Int , vol.28 , Issue.12 , pp. 26
    • Singer, P.1
  • 32
    • 0346076629 scopus 로고    scopus 로고
    • Contact resistance measurement of bonded copper interconnects for three-dimensional integration technology
    • Chen KN, Fan A, Tan CS, Reif R. Contact resistance measurement of bonded copper interconnects for three-dimensional integration technology. IEEE Elect Device Lett 2004;25(1):2004.
    • (2004) IEEE Elect Device Lett , vol.25 , Issue.1 , pp. 2004
    • Chen, K.N.1    Fan, A.2    Tan, C.S.3    Reif, R.4
  • 33
    • 19744383948 scopus 로고    scopus 로고
    • Abnormal contact resistance reduction of bonded copper interconnects in three-dimensional integration during current stressing
    • (011903):011903-1-011903-3.
    • Chen KN, Tan CS, Reif R. Abnormal contact resistance reduction of bonded copper interconnects in three-dimensional integration during current stressing. Appl Phys Lett 2005;86 (011903):011903-1-011903-3.
    • (2005) Appl Phys Lett , vol.86
    • Chen, K.N.1    Tan, C.S.2    Reif, R.3
  • 34
    • 0035304419 scopus 로고    scopus 로고
    • Microstructure examination of copper wafer bonding
    • Chen KN, Fan A, Rief R. Microstructure examination of copper wafer bonding. J Electr Mater 2001;30 (4):331-335.
    • (2001) J Electr Mater , vol.30 , Issue.4 , pp. 331-335
    • Chen, K.N.1    Fan, A.2    Rief, R.3
  • 35
    • 0037065038 scopus 로고    scopus 로고
    • Microstructure evolution and abnormal grain growth during copper wafer bonding
    • Chen KN, Fan A, Tan CS, Reif R. Microstructure evolution and abnormal grain growth during copper wafer bonding. Appl Phys Lett 2002;81(20):3774-3776.
    • (2002) Appl Phys Lett , vol.81 , Issue.20 , pp. 3774-3776
    • Chen, K.N.1    Fan, A.2    Tan, C.S.3    Reif, R.4
  • 38
    • 33646236322 scopus 로고    scopus 로고
    • Threedimensional wafer stacking via Cu-Cu bonding integrated with 65-nm strained-Si/low-k CMOS technology
    • Morrow P, Park C-M, Ramanathan S, Kobrinsky MJ, Harmes M. Threedimensional wafer stacking via Cu-Cu bonding integrated with 65-nm strained-Si/low-k CMOS technology. IEEE Elect Device Lett 2006;27(5):335-337.
    • (2006) IEEE Elect Device Lett , vol.27 , Issue.5 , pp. 335-337
    • Morrow, P.1    Park, C.-M.2    Ramanathan, S.3    Kobrinsky, M.J.4    Harmes, M.5
  • 39
    • 33947407658 scopus 로고    scopus 로고
    • Three-dimensional integrated circuits and the future of system-on-chip designs
    • Patti R. Three-dimensional integrated circuits and the future of system-on-chip designs. Proceedings of the IEEE 2006;94 (No. 6):1214-1222.
    • (2006) Proceedings of the IEEE , vol.94 , Issue.6 , pp. 1214-1222
    • Patti, R.1
  • 40
    • 84889835799 scopus 로고    scopus 로고
    • http://www.tezzaron.com
  • 42
    • 84889837569 scopus 로고    scopus 로고
    • Advance Data Product Information:1/2/4Mb FaStack™ Synchronous Burst SRAM, Tezzaron Semiconductor Corp., Rev. 1.2, August 20,2004.
    • Advance Data Product Information:1/2/4Mb FaStack™ Synchronous Burst SRAM, Tezzaron Semiconductor Corp., Rev. 1.2, August 20,2004.
  • 44
    • 0035054745 scopus 로고    scopus 로고
    • Three-dimensional integrated circuits for low-power, high-bandwidth systems on a chip
    • Burns J, McIlrath L, Keast C, Loomis A, Warner K, Wyatt P. Three-dimensional integrated circuits for low-power, high-bandwidth systems on a chip. Proc IEEE ISSCC 2001;453:268-269.
    • (2001) Proc IEEE ISSCC , vol.453 , pp. 268-269
    • Burns, J.1    McIlrath, L.2    Keast, C.3    Loomis, A.4    Warner, K.5    Wyatt, P.6
  • 48
    • 18344373109 scopus 로고    scopus 로고
    • Thermal cycling effects on critical adhesion energy and residual stress in benzocyclobutene-bonded wafers
    • Kwon Y, Seok J, Lu J-Q, Cale TS, Gutmann RJ. Thermal cycling effects on critical adhesion energy and residual stress in benzocyclobutene-bonded wafers. J Electrochem Soc 2005;152 (4):G286-G294.
    • (2005) J Electrochem Soc , vol.152 , Issue.4
    • Kwon, Y.1    Seok, J.2    Lu, J.-Q.3    Cale, T.S.4    Gutmann, R.J.5
  • 55
    • 0034484432 scopus 로고    scopus 로고
    • One micron precision, wafer-level aligned bonding for interconnect, MEMS and packaging applications
    • Mirza A. One micron precision, wafer-level aligned bonding for interconnect, MEMS and packaging applications. Proceedings of the Electronic Components and Technology Conference; 2000. p 676-680.
    • (2000) Proceedings of the Electronic Components and Technology Conference , pp. 676-680
    • Mirza, A.1
  • 56
    • 0034318655 scopus 로고    scopus 로고
    • Novel alignment system for imprint lithography
    • White D, Wood OII. Novel alignment system for imprint lithography. J Vacuum Sci Technol B 2000;18 (6):3552-3556.
    • (2000) J Vacuum Sci Technol B , vol.18 , Issue.6 , pp. 3552-3556
    • White, D.1    Wood, O.I.I.2
  • 58
    • 0242270003 scopus 로고    scopus 로고
    • A method to maintain wafer alignment precision during adhesive wafer bonding
    • Niklaus F, Enoksson P, Kalvesten E, Stemme G. A method to maintain wafer alignment precision during adhesive wafer bonding. Sensors Actuators A 2003;107:273-278.
    • (2003) Sensors Actuators A , vol.107 , pp. 273-278
    • Niklaus, F.1    Enoksson, P.2    Kalvesten, E.3    Stemme, G.4
  • 60
    • 0029637854 scopus 로고
    • Silicon-on-insulator material technology
    • Bruel M. Silicon-on-insulator material technology. Electr Lett 1995;31(14):1201-1202.
    • (1995) Electr Lett , vol.31 , Issue.14 , pp. 1201-1202
    • Bruel, M.1
  • 61
    • 0004050161 scopus 로고    scopus 로고
    • Semiconductor Wafer Bonding
    • New York:Wiley;
    • Tong Q-Y, Gosele U. Semiconductor Wafer Bonding. New York:Wiley; 1999.
    • (1999)
    • Tong, Q.-Y.1    Gosele, U.2
  • 64
    • 0037103962 scopus 로고    scopus 로고
    • Interfacial morphologies and possible mechanisms of copper wafer bonding
    • Chen K, Fan A, Reif R. Interfacial morphologies and possible mechanisms of copper wafer bonding. J Mater Sci 2002;37:3441-3446.
    • (2002) J Mater Sci , vol.37 , pp. 3441-3446
    • Chen, K.1    Fan, A.2    Reif, R.3
  • 65
    • 0038184882 scopus 로고    scopus 로고
    • Microstructure and reliability of copper interconnects
    • Stanford University
    • Ryu C. Microstructure and reliability of copper interconnects. Ph.D. Thesis, Stanford University, 1998. p 100.
    • (1998) Ph.D. Thesis , pp. 100
    • Ryu, C.1
  • 66
    • 84944030663 scopus 로고    scopus 로고
    • Quantitative characterization and process optimization of low-temperature bonded copper interconnects for 3-D integrated circuits
    • Tadepalli R, Thompson CV. Quantitative characterization and process optimization of low-temperature bonded copper interconnects for 3-D integrated circuits. Proceedings of The IEEE International Interconnect Technology Conference; 2003. p 36-38.
    • (2003) Proceedings of The IEEE International Interconnect Technology Conference , pp. 36-38
    • Tadepalli, R.1    Thompson, C.V.2
  • 69
    • 0030291023 scopus 로고    scopus 로고
    • Performance improvement of the memory of RISC-systems by application of 3-D technology
    • Kleiner MB, Kuhn SA, Ramm P, Weber W. Performance improvement of the memory of RISC-systems by application of 3-D technology. IEEE Trans Comp Pack Manuf Technol B 1996;19 (4):709-718.
    • (1996) IEEE Trans Comp Pack Manuf Technol B , vol.19 , Issue.4 , pp. 709-718
    • Kleiner, M.B.1    Kuhn, S.A.2    Ramm, P.3    Weber, W.4
  • 71
    • 84889777874 scopus 로고    scopus 로고
    • Wafer bonding for three dimensional integration
    • Rensselaer Polytechnic Institute
    • Kwon Y. Wafer bonding for three dimensional integration. Ph.D. Thesis, Rensselaer Polytechnic Institute, 2004.
    • (2004) Ph.D. Thesis
    • Kwon, Y.1
  • 74
    • 0242281373 scopus 로고    scopus 로고
    • Adhesive wafer bonding for microelectronic and microelectromechanical systems
    • Royal Institute of Technology (KTH), Stockholm, Sweden.
    • Niklaus F. Adhesive wafer bonding for microelectronic and microelectromechanical systems. Ph.D. Thesis, Royal Institute of Technology (KTH), Stockholm, Sweden.
    • Ph.D. Thesis
    • Niklaus, F.1
  • 75
    • 33645536175 scopus 로고    scopus 로고
    • Adhesive wafer bonding
    • J Appl Phys, 031101-1-031101-28
    • Niklaus F, Stemme G, Lu J-Q, Gutmann RJ. Adhesive wafer bonding. J Appl Phys 2006;99:031101-1-031101-28.
    • (2006) , vol.99
    • Niklaus, F.1    Stemme, G.2    Lu, J.-Q.3    Gutmann, R.J.4
  • 78
    • 33644802186 scopus 로고    scopus 로고
    • Adhesive wafer bonding using partially cured benzocyclobutene for three-dimensional integration
    • Niklaus F, Kumar R, McMahon J, Yu J, Lu J-Q, Cale T, Gutmann R. Adhesive wafer bonding using partially cured benzocyclobutene for three-dimensional integration. J Electrochem Soc 2006;153 (4):G291-G295.
    • (2006) J Electrochem Soc , vol.153 , Issue.4
    • Niklaus, F.1    Kumar, R.2    McMahon, J.3    Yu, J.4    Lu, J.-Q.5    Cale, T.6    Gutmann, R.7
  • 81
    • 84889771822 scopus 로고    scopus 로고
    • http://www.aptekindustries.com
  • 84
    • 0003532370 scopus 로고    scopus 로고
    • Thinning wafers for flip chip applications
    • Francis D. Thinning wafers for flip chip applications. High Density Interconnect Magazine 1999;2(5):22-25.
    • (1999) High Density Interconnect Magazine , vol.2 , Issue.5 , pp. 22-25
    • Francis, D.1
  • 92
    • 33750437717 scopus 로고    scopus 로고
    • Low temperature bonding of copper pillars for all-copper chip-to-substrate interconnects
    • He A, Osborn T, Bidstrup S, Allen P, Kohl P. Low temperature bonding of copper pillars for all-copper chip-to-substrate interconnects. Electrochem Solid-State Lett 2006;9 (12):C192-C195.
    • (2006) Electrochem Solid-State Lett , vol.9 , Issue.12
    • He, A.1    Osborn, T.2    Bidstrup, S.3    Allen, P.4    Kohl, P.5
  • 93
    • 0001860560 scopus 로고
    • Polishing of silicon
    • Mendel E. Polishing of silicon. Solid State Technol 1967;10:27-39.
    • (1967) Solid State Technol , vol.10 , pp. 27-39
    • Mendel, E.1
  • 94
    • 0003508875 scopus 로고    scopus 로고
    • Chemical Mechanical Planarization of Microelectronic Materials
    • Wiley; New York
    • Steigerwald J, Murarka S, Gutmann R. Chemical Mechanical Planarization of Microelectronic Materials. Wiley; New York 1997.
    • (1997)
    • Steigerwald, J.1    Murarka, S.2    Gutmann, R.3
  • 96
    • 1042277679 scopus 로고    scopus 로고
    • Chemical-Mechanical Polishing of Low Dielectric Constant Polymers and Organosilicate Glasses
    • Kluwer Academic Publishers; Boston
    • Borst C, Gill W, Gutmann R Chemical-Mechanical Polishing of Low Dielectric Constant Polymers and Organosilicate Glasses. Kluwer Academic Publishers; Boston 2002.
    • (2002)
    • Borst, C.1    Gill, W.2    Gutmann, R.3
  • 98
    • 7544227823 scopus 로고    scopus 로고
    • Copper CMP: taking aim at dishing
    • Singer P. Copper CMP: taking aim at dishing. Semicond Int 2004;27 (11):38-42.
    • (2004) Semicond Int , vol.27 , Issue.11 , pp. 38-42
    • Singer, P.1
  • 99
    • 33644963194 scopus 로고    scopus 로고
    • Global uniformity optimization and its impact on the distribution of physical and electrical properties of Cu damascene lines
    • Kwak B, Sun S-S, Falk C, Burke P. Global uniformity optimization and its impact on the distribution of physical and electrical properties of Cu damascene lines. Proceedings of the Advanced Metallization Conference; 2005. p 495-499.
    • (2005) Proceedings of the Advanced Metallization Conference , pp. 495-499
    • Kwak, B.1    Sun, S.-S.2    Falk, C.3    Burke, P.4
  • 102
    • 12744260669 scopus 로고    scopus 로고
    • Planarization issues in wafer-level three-dimensional (3D) integration
    • Lu J-Q, Rajagopalan G, Gupta M, Cale T, Gutmann R. Planarization issues in wafer-level three-dimensional (3D) integration. MRS Symp Proc 2004;816:K7.7.1-K7.7.10.
    • (2004) MRS Symp Proc , vol.816
    • Lu, J.-Q.1    Rajagopalan, G.2    Gupta, M.3    Cale, T.4    Gutmann, R.5
  • 105
    • 33645321112 scopus 로고    scopus 로고
    • The wafer's edge
    • Braun A, The wafer's edge. Semicond Int 2006;29 (3):44-48.
    • (2006) Semicond Int , vol.29 , Issue.3 , pp. 44-48
    • Braun, A.1
  • 106
    • 0343597405 scopus 로고    scopus 로고
    • The influence of wafer dimensions on the contact wave velocity in silicon wafer bonding
    • Bengtsson S, Ljungberg K, Vedde J. The influence of wafer dimensions on the contact wave velocity in silicon wafer bonding. Appl Phys Lett 1996;69 (22):3381-3383.
    • (1996) Appl Phys Lett , vol.69 , Issue.22 , pp. 3381-3383
    • Bengtsson, S.1    Ljungberg, K.2    Vedde, J.3
  • 107
    • 0942288923 scopus 로고    scopus 로고
    • Mechanics of Wafer Bonding: Effect of Clamping
    • Turner K, Thouless M, Spearing S. Mechanics of Wafer Bonding: Effect of Clamping. J Appl Phys 2004;95 (1):349-355.
    • (2004) J Appl Phys , vol.95 , Issue.1 , pp. 349-355
    • Turner, K.1    Thouless, M.2    Spearing, S.3
  • 108
    • 0037115728 scopus 로고    scopus 로고
    • Modeling of direct wafer bonding: effect of wafer bow and etch patterns
    • Turner K, Spearing S. Modeling of direct wafer bonding: effect of wafer bow and etch patterns. J Appl Phys 2002;92(12):7658-7666.
    • (2002) J Appl Phys , vol.92 , Issue.12 , pp. 7658-7666
    • Turner, K.1    Spearing, S.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.