Clocking analysis, implementation and measurement techniques for high-speed data links - A tutorial

IEEE Transactions on Circuits and Systems I: Regular Papers

Volumn 56, Issue 1, 2009, Pages 17-39

  Casper, Brian ^a   O'Mahony, Frank ^a  

^a INTEL CORPORATION   (United States)

Author keywords

Bandwidth; Clock distribution; Clock recovery; Clocks; High speed I O; Jitter; Microprocessors; Noise; Phase locked loops; Phase locked loops; Synchronization

Indexed keywords

BANDWIDTH; COMMERCE; JITTER; MICROPROCESSOR CHIPS; PHASE LOCKED LOOPS; SYNCHRONIZATION; SYSTEMS ANALYSIS;

CLOCK DISTRIBUTION; CLOCK RECOVERY; FUTURE APPLICATIONS; HIGH SPEED I/O; MEASUREMENT TECHNIQUES; MICROPROCESSOR SYSTEMS; NOISE; SYSTEM-LEVEL ARCHITECTURES;

CLOCKS;

EID: 60649103812     PISSN: 10577122     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCSI.2008.931647     Document Type: Article

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