A 40-Gb/s Clock and Data Recovery Circuit in 0.18-μm CMOS Technology

IEEE Journal of Solid-State Circuits

Volumn 38, Issue 12, 2003, Pages 2181-2190

  Lee, Jri ^a   Razavi, Behzad ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

CDR circuits; Demultiplexers; Injection locking; Oscillators; Phase detectors; Phase locked loops

Indexed keywords

BANG BANG CONTROL SYSTEMS; BIPOLAR TRANSISTORS; DEMULTIPLEXING; ERROR ANALYSIS; FLIP FLOP CIRCUITS; JITTER; NATURAL FREQUENCIES; OSCILLATORS (ELECTRONIC); PHASE LOCKED LOOPS; PHASE SHIFT; POWER SUPPLY CIRCUITS; TOPOLOGY;

DEMULTIPLEXERS; INJECTION LOCKING; PHASE DETECTORS;

CMOS INTEGRATED CIRCUITS;

EID: 0346342381     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2003.818566     Document Type: Conference Paper

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