메뉴 건너뛰기




Volumn 51, Issue , 2008, Pages

A 27Gb/s forwarded-clock I/O receiver using an injection-locked LC-DCO in 45nm CMOS

Author keywords

[No Author keywords available]

Indexed keywords

CLOCK JITTERS; CMOS TECHNOLOGIES; DATA RECEIVERS; HIGH FREQUENCIES; INJECTION LOCKING; INJECTION-LOCKED; INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE; SUPPLY NOISE;

EID: 49549086645     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSCC.2008.4523252     Document Type: Conference Paper
Times cited : (42)

References (7)
  • 1
    • 39749158611 scopus 로고    scopus 로고
    • A Low-Jitter PLL and Repeaterless Clock Distribution Network for a 20Gb/s Link
    • June
    • F. O'Mahony M. Mansuri et al., "A Low-Jitter PLL and Repeaterless Clock Distribution Network for a 20Gb/s Link," Proc. VLSI, pp. 29-30, June 2006.
    • (2006) Proc. VLSI , pp. 29-30
    • O'Mahony, F.1    Mansuri, M.2
  • 3
    • 39049156820 scopus 로고    scopus 로고
    • Injection-Locked Clocking: A New GHz Clock Distribution Scheme
    • Sep
    • L. Zhang, B. Ciftcioglu, M. Huang, W. Hui, "Injection-Locked Clocking: A New GHz Clock Distribution Scheme," Proc. IEEE CICC, pp. 785-788, Sep. 2006.
    • (2006) Proc. IEEE CICC , pp. 785-788
    • Zhang, L.1    Ciftcioglu, B.2    Huang, M.3    Hui, W.4
  • 4
    • 0000868747 scopus 로고
    • Injection Locking of Oscillators
    • Nov
    • L. J. Paciorek, "Injection Locking of Oscillators," Proc. IEEE, vol. 53, no. 11, pp. 1723-1728, Nov. 1965.
    • (1965) Proc. IEEE , vol.53 , Issue.11 , pp. 1723-1728
    • Paciorek, L.J.1
  • 5
    • 84933846712 scopus 로고
    • A Study of Locking Phenomena in Oscillators
    • June, reprinted in Proc. IEEE, 61, pp. 1380-1385, Oct. 1973
    • R. Adler, "A Study of Locking Phenomena in Oscillators," Proc. IRE, vol. 34, pp. 351-356, June 1946, reprinted in Proc. IEEE, vol. 61, pp. 1380-1385, Oct. 1973.
    • (1946) Proc. IRE , vol.34 , pp. 351-356
    • Adler, R.1
  • 6
    • 39749190774 scopus 로고    scopus 로고
    • A Scalable 5-15Gbps 14-75mW Low Power I/O Transceiver in 65nm CMOS
    • Jun
    • G. Balamurugan, J. Kennedy, G. Banerjee et al., "A Scalable 5-15Gbps 14-75mW Low Power I/O Transceiver in 65nm CMOS", Symp. VLSI Circuits, pp. 270-271, Jun. 2007.
    • (2007) Symp. VLSI Circuits , pp. 270-271
    • Balamurugan, G.1    Kennedy, J.2    Banerjee, G.3
  • 7
    • 33845614827 scopus 로고    scopus 로고
    • A 25-Gb/s CDR in 90nm CMOS for High-Density Interconnects
    • Dec
    • C. Kromer, G. Sialm, C. Menolfi et al., "A 25-Gb/s CDR in 90nm CMOS for High-Density Interconnects," IEEE J. Solid-State Circuits, vol. 41, no. 12, pp. 2921-2929, Dec. 2006.
    • (2006) IEEE J. Solid-State Circuits , vol.41 , Issue.12 , pp. 2921-2929
    • Kromer, C.1    Sialm, G.2    Menolfi, C.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.