A resonant global clock distribution for the Cell Broadband-Engine™ processor

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 51, Issue , 2008, Pages 512-514

  Chan, Steven ^a   Restle, Phillip ^a   Bucelot, Thomas ^a   Weitzel, Stephen ^a   Keaty, John ^a   Liberty, John ^a   Flachs, Brian ^a   Volant, Richard ^a   Kapusta, Peter ^a   Zimmerman, Jeff ^a  

^a IBM   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ENGINES;

CELL BROADBAND ENGINE; GLOBAL CLOCKS; HIGH-PERFORMANCE MICROPROCESSORS; NONRESONANT; ON-CHIP SPIRAL INDUCTORS; POWER SAVINGS; PROCESSOR DESIGN; RESONANT CLOCK;

CLOCKS;

EID: 49549087309     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSCC.2008.4523282     Document Type: Conference Paper

References (3)

1. L-M. Lee and C-K, Yang, "An Adaptive Low-Jitter LC-Based Clock Distribution," ISSCC Dig. Tech. Papers, pp. 182-183, Feb. 2007.
2. S. C. Chan, P. J. Restle, K. L. Shepard et al., "A 4.6GHz Resonant Global Clock Distribution Network," ISSCC Dig. Tech. Papers, pp. 342-343, Feb. 2004.
3. D. Pham, S. Asano, M. Bolliger et al., "The Design and Implementation of a First-Generation CELL Processor," ISSCC Dig. Tech. Papers, pp. 184-185, Feb. 2005.