A 10-Gb/s CMOS clock and data recovery circuit with a half-rate linear phase detector

IEEE Journal of Solid-State Circuits

Volumn 36, Issue 5, 2001, Pages 761-768

  Savoj, Jafar ^a,b   Razavi, Behzad ^a,b  

^a IEEE   (United States)

^b University of California   (United States)

Author keywords

Clock recovery; Half rate CDR; Optical communication; Oscillators; Phase detectors; PLLs

Indexed keywords

CLOCK AND DATA RECOVERY CIRCUIT; HALF RATE PHASE DETECTORS;

BIT ERROR RATE; ELECTRIC LOSSES; ELECTRIC POWER SUPPLIES TO APPARATUS; INTEGRATED CIRCUIT LAYOUT; OPTICAL COMMUNICATION; PHASE LOCKED LOOPS; VARIABLE FREQUENCY OSCILLATORS;

CMOS INTEGRATED CIRCUITS;

EID: 0035333506     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.918913     Document Type: Article

References (9)

1. SiGe clock and data recovery IC with linear type PLL for 10-Gb/s SONET application
2. 40-Gb/s integrated clock and data recovery circuit in a silicon bipolar technology
3. Clock/data recovery PLL using half-frequency clock
4. A 6 Gb/s CMOS phase detecting DEMUX module using half-frequency clock
5. T = 25 GHz
6. A self-correcting clock recovery circuit
7. Design techniques for low-voltage high-speed digital bipolar circuits
8. A versatile clock recovery architecture and monolithic implementation
9. A 10-Gb/s CMOS clock and data recovery circuit with frequency detection