Modeling and analysis of high-speed links

Proceedings of the Custom Integrated Circuits Conference

Volumn , Issue , 2003, Pages 589-594

  Stojanovic, Vladimir ^a,b   Horowitz, Mark ^a  

^a STANFORD UNIVERSITY   (United States)

^b RAMBUS INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMMUNICATION CHANNELS (INFORMATION THEORY); DIGITAL SIGNAL PROCESSING; INTEGRATED CIRCUIT LAYOUT; MODEMS; PHASE LOCKED LOOPS; PROBABILITY DISTRIBUTIONS; SIGNAL DISTORTION; TRANSFER FUNCTIONS; WHITE NOISE;

CLOCK-AND-DATA RECOVERY LOOP; HIGH-SPEED LINKS;

BIT ERROR RATE;

EID: 0242443638     PISSN: 08865930     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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