Investigation of electrical characteristics on surrounding-gate and omega-shaped-gate nanowire FinFETs

IEEE Transactions on Nanotechnology

Volumn 4, Issue 5, 2005, Pages 510-516

  Li, Yiming ^{a,b,c,d,e,f,g}   Chou, Hung Mu ^b   Lee, Jam Wem ^b  

^a IEEE   (Taiwan)

^b NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

^c NCTU ^*  (United States)

^d AMERICAN PHYSICAL SOCIETY   (United States)

^e ASSOCIATION FOR COMPUTING MACHINERY   (United States)

^f Institute of Electronics   (Japan)

^g Society for Industrial and Applied Mathematics   (Taiwan)

Author keywords

Coverage ratio; Device structure; Fabrication; Fin field effect transistor (FinFET); Gate capacitance; Nanodevice; Nanowire; Omega shaped gate; On off ratio; Process technique; Quantum correction model; Semiconductor devices; Subthreshold swing (SS)

Indexed keywords

COVERAGE RATIO; DEVICE STRUCTURE; FIN FIELD-EFFECT TRANSISTOR (FINFET); GATE CAPACITANCE; NANODEVICE; NANOWIRE; OMEGA-SHAPED-GATE; ON/OFF RATIO; PROCESS TECHNIQUE; QUANTUM CORRECTION MODEL;

CAPACITANCE; CHANNEL CAPACITY; COMPUTER SIMULATION; ELECTRIC RESISTANCE; FABRICATION; MATHEMATICAL MODELS; NANOSTRUCTURED MATERIALS; QUANTUM THEORY;

FIELD EFFECT TRANSISTORS;

EID: 26644460422     PISSN: 1536125X     EISSN: None     Source Type: Journal    
DOI: 10.1109/TNANO.2005.851410     Document Type: Article

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