A practical implementation of parallel dynamic load balancing for adaptive computing in VLSI device simulation

Engineering with Computers

Volumn 18, Issue 2, 2002, Pages 124-137

  Li, Y ^a,b   Sze, S M ^a,b   Chao, T S ^a,b  

^a NATIONAL NANO DEVICE LABORATORIES   (Taiwan)

^b NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

Author keywords

DTMOS; Dynamic domain decomposition; Linux cluster; Load balancing; MOSFET; Parallel I V points calculation; VLSI device simulation

Indexed keywords

ADAPTIVE ALGORITHMS; COMPUTER SIMULATION; CURRENT VOLTAGE CHARACTERISTICS; DATA HANDLING; FINITE VOLUME METHOD; INTERFACES (COMPUTER); ITERATIVE METHODS; MOSFET DEVICES; NUMERICAL METHODS; PARALLEL PROCESSING SYSTEMS; SEMICONDUCTOR DEVICE TESTING; VLSI CIRCUITS;

ADAPTIVE COMPUTING; ADAPTIVE FINITE VOLUME METHOD; DYNAMIC PARALLEL DOMAIN DECOMPOSITION; LINUX CLUSTER; MESSAGE PASSING INTERFACE; PARALLEL CURRENT VOLTAGE POINTS CALCULATION; PARALLEL DYNAMIC LOAD BALANCING; PARALLEL SEMICONDUCTOR DEVICE SIMULATION;

COMPUTER AIDED ANALYSIS;

EID: 0036361047     PISSN: 01770667     EISSN: None     Source Type: Journal    
DOI: 10.1007/s003660200011     Document Type: Article

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