Multiple-gate SOI MOSFETs: Device design guidelines

IEEE Transactions on Electron Devices

Volumn 49, Issue 12, 2002, Pages 2222-2229

  Park, Jong Tae ^a   Colinge, Jean Pierre ^b  

^a SolarLight Ltd   (South Korea)

^b University of California Davis   (United States)

Author keywords

Insulated gate FETs; MOS devices; Semiconductor device modeling; Silicon on insulator technology

Indexed keywords

COMPUTER SIMULATION; ELECTRIC PROPERTIES; ELECTRODES; GATES (TRANSISTOR); SEMICONDUCTING FILMS; SEMICONDUCTING SILICON; SEMICONDUCTOR DEVICE MODELS; SEMICONDUCTOR DEVICE STRUCTURES; SEMICONDUCTOR DOPING; SILICON ON INSULATOR TECHNOLOGY;

DOPING CONCENTRATION; GATE LENGTH; MULTIPLE-GATE SILICON ON INSULATOR MOSFETS; TRIPLE-GATE DEVICE;

MOSFET DEVICES;

EID: 0036999661     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2002.805634     Document Type: Article

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