The resilience wall: Cross-layer solution strategies

Proceedings of Technical Program - 2014 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2014

Volumn , Issue , 2014, Pages

  Mitra, Subhasish ^a   Bose, Pradip ^b   Cheng, Eric ^a   Cher, Chen Yong ^b   Cho, Hyungmin ^a   Joshi, Rajiv ^b   Kim, Young Moon ^a,c   Lefurgy, Charles R ^b   Li, Yanjing ^a,c   Rodbell, Kenneth P ^b   Skadron, Kevin ^d   Stathis, James ^b   Szafaryn, Lukasz ^d  

^a STANFORD UNIVERSITY   (United States)

^b IBM RESEARCH   (United States)

^c INTEL CORPORATION   (United States)

^d UNIVERSITY OF VIRGINIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION PROGRAMS; SUPERCOMPUTERS; SYSTEMS ANALYSIS;

COMPUTING SYSTEM; ENERGY EFFICIENT; EXPLOSIVE GROWTH; HARDWARE FAILURES; MULTIPLE LAYERS; SOLUTION STRATEGY; SYSTEM LIFETIMES; SYSTEM STACKS;

VLSI CIRCUITS;

EID: 84904169947     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSI-TSA.2014.6839639     Document Type: Conference Paper

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