Gate-oxide early-life failure identification using delay shifts

Proceedings of the IEEE VLSI Test Symposium

Volumn , Issue , 2010, Pages 69-74

  Kim, Young Moon ^a   Chen, Tze Wee ^a   Kameda, Yoshio ^a   Mizuno, Masayuki ^a   Mitra, Subhasish ^a,b  

^a Stanford University   (United States)

^b NEC CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS RELIABILITY; DIGITAL TECHNIQUES; EXPERIMENTAL DATA; FAILURE IDENTIFICATION; GATE OXIDE; INFANT MORTALITY; PRODUCTION TEST; SELF-HEALING; SYSTEM OPERATION; TEST CHIPS;

CIRCUIT SIMULATION; DIGITAL INTEGRATED CIRCUITS; ELECTRIC FURNACES;

BUILT-IN SELF TEST;

EID: 77953901218     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VTS.2010.5469615     Document Type: Conference Paper

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