Self-repair of uncore components in robust system-on-chips: An OpenSPARC T2 case study

Proceedings - International Test Conference

Volumn , Issue , 2013, Pages

  Li, Yanjing ^a,b   Cheng, Eric ^a   Makar, Samy ^a   Mitra, Subhasish ^a  

^a STANFORD UNIVERSITY   (United States)

^b INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION PERFORMANCE; ARCHITECTURAL FEATURES; GRACEFUL DEGRADATION; MANUFACTURING DEFECTS; NETWORKS ON CHIPS; PERFORMANCE COSTS; PERFORMANCE IMPACT; REDUNDANCY TECHNIQUES;

APPLICATION SPECIFIC INTEGRATED CIRCUITS; COSTS; MICROPROCESSOR CHIPS; PROGRAMMABLE LOGIC CONTROLLERS;

REPAIR;

EID: 84891503079     PISSN: 10893539     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/TEST.2013.6651907     Document Type: Conference Paper

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