Soft-error resilience of the IBM POWER6 processor

IBM Journal of Research and Development

Volumn 52, Issue 3, 2008, Pages 275-284

  Sanda, Pia N ^a   Kellington, Jeffrey W ^a   Kudva, Prabhakar ^b   Kalla, Ronald ^a   McBeth, Ryan B ^a   Ackaret, Jerry ^a   Lockwood, Ryan ^a   Schumann, John ^a   Jones, Christopher R ^a  

^a IBM   (United States)

^b IBM T J WATSON RESEARCH CENTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ERROR CORRECTION; ERRORS; INDUSTRY; MULTITASKING; PARTICLE BEAMS;

ERROR DETECTION AND CORRECTION (EDAC); ERROR RESILIENCE (ER); ERROR RESILIENCY; FAULT-INJECTION; INTERNATIONAL BUSINESS; PROCESSOR SIMULATION; SINGLE EVENT UPSET (SEU);

ERROR DETECTION;

EID: 45749133027     PISSN: 00188646     EISSN: 00188646     Source Type: Journal    
DOI: 10.1147/rd.523.0275     Document Type: Article

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