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Volumn 10, Issue 1 SUPPL. 1, 2010, Pages

Barrier engineering in metal-aluminum oxide-nitride-oxide-silicon (MANOS) flash memory: Invited

Author keywords

Barrier engineering; Blocking oxide; Charge trap flash memory; Metal workfunction; Tunnel barrier

Indexed keywords

BARRIER ENGINEERING; BLOCKING OXIDE; CHARGE TRAP FLASH MEMORY; OXIDE CHARGE; TUNNEL BARRIER;

EID: 77649238723     PISSN: 15671739     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.cap.2009.12.007     Document Type: Article
Times cited : (17)

References (47)
  • 1
    • 67349279609 scopus 로고    scopus 로고
    • Floating gate technology for high performance 8-level 3-bit NAND flash memory
    • Kim T.K., Chang S., and Choi J.H. Floating gate technology for high performance 8-level 3-bit NAND flash memory. Solid-State Electronics 53 (2009) 792-797
    • (2009) Solid-State Electronics , vol.53 , pp. 792-797
    • Kim, T.K.1    Chang, S.2    Choi, J.H.3
  • 3
    • 65849393681 scopus 로고    scopus 로고
    • 32 nm and below logic patterning using optimized illumination and double patterning
    • The International Society for Optical Engineering, San Jose, CA
    • M.C. Smayling, V. Axelrad, 32 nm and below logic patterning using optimized illumination and double patterning, in: Proceedings of SPIE - The International Society for Optical Engineering, San Jose, CA, 2009.
    • (2009) Proceedings of SPIE
    • Smayling, M.C.1    Axelrad, V.2
  • 8
    • 59049101290 scopus 로고    scopus 로고
    • Future challenges of flash memory technologies
    • Lu C.Y., Hsieh K.Y., and Liu R. Future challenges of flash memory technologies. Microelectronic Engineering 86 (2009) 283-286
    • (2009) Microelectronic Engineering , vol.86 , pp. 283-286
    • Lu, C.Y.1    Hsieh, K.Y.2    Liu, R.3
  • 9
  • 13
    • 68249146434 scopus 로고    scopus 로고
    • Modeling TANOS memory program transients to investigate charge-trapping dynamics
    • Padovani A., Larcher L., Heh D., and Bersuker G. Modeling TANOS memory program transients to investigate charge-trapping dynamics. IEEE Electron Device Letters 30 (2009) 882-884
    • (2009) IEEE Electron Device Letters , vol.30 , pp. 882-884
    • Padovani, A.1    Larcher, L.2    Heh, D.3    Bersuker, G.4
  • 18
    • 47249154755 scopus 로고    scopus 로고
    • Z. Huo, J. Yang, S. Lim, S. Baik, J. Lee, J. Han, I.S. Yeo, U.I. Chung, L.T. Moon, B.I. Ryu, Band engineered charge trap layer for highly reliable MLC flash memory, in: Digest of Technical Papers - Symposium on VLSI Technology, Kyoto, 2007, pp. 138-139.
    • Z. Huo, J. Yang, S. Lim, S. Baik, J. Lee, J. Han, I.S. Yeo, U.I. Chung, L.T. Moon, B.I. Ryu, Band engineered charge trap layer for highly reliable MLC flash memory, in: Digest of Technical Papers - Symposium on VLSI Technology, Kyoto, 2007, pp. 138-139.
  • 23
    • 70349993199 scopus 로고    scopus 로고
    • High work-function oxygen-bearing electrodes for improved performance in MANOS charge-trap NVM and MIM-DRAM type devices
    • IEEE International
    • D.C. Gilmer, N. Goel, H. Park, C. Park, J. Barnett, P.D. Kirsch, R. Jammy, High work-function oxygen-bearing electrodes for improved performance in MANOS charge-trap NVM and MIM-DRAM type devices, in Memory Workshop, 2009. IMW '09. IEEE International, 2009, pp. 1-2.
    • (2009) Memory Workshop, 2009. IMW '09 , pp. 1-2
    • Gilmer, D.C.1    Goel, N.2    Park, H.3    Park, C.4    Barnett, J.5    Kirsch, P.D.6    Jammy, R.7
  • 24
    • 0037042017 scopus 로고    scopus 로고
    • Band structures and band offsets of high K dielectrics on Si
    • Robertson J. Band structures and band offsets of high K dielectrics on Si. Applied Surface Science 190 (2002) 2-10
    • (2002) Applied Surface Science , vol.190 , pp. 2-10
    • Robertson, J.1
  • 25
    • 0034187380 scopus 로고    scopus 로고
    • Band offsets of wide-band-gap oxides and implications for future electronic devices
    • Robertson J. Band offsets of wide-band-gap oxides and implications for future electronic devices. Journal of Vacuum Science Technology - Part B 18 (2000) 1785-1791
    • (2000) Journal of Vacuum Science Technology - Part B , vol.18 , pp. 1785-1791
    • Robertson, J.1
  • 28
    • 67349086061 scopus 로고    scopus 로고
    • Reliability issues and modeling of flash and post-flash memory
    • (invited paper)
    • Ielmini D. Reliability issues and modeling of flash and post-flash memory. Microelectronic Engineering 86 (2009) 1870-1875 (invited paper)
    • (2009) Microelectronic Engineering , vol.86 , pp. 1870-1875
    • Ielmini, D.1
  • 29
    • 34547359686 scopus 로고    scopus 로고
    • R. Huang, F. Zhou, Y. Li, Y. Cai, X. Shan, X. Zhang, Y. Wang, Novel silicon-based flash cell structures for low power and high density memory applications, in: ICSICT-2006: 2006 8th International Conference on Solid-State and Integrated Circuit Technology, Proceedings, Shanghai, 2007, pp. 709-712.
    • R. Huang, F. Zhou, Y. Li, Y. Cai, X. Shan, X. Zhang, Y. Wang, Novel silicon-based flash cell structures for low power and high density memory applications, in: ICSICT-2006: 2006 8th International Conference on Solid-State and Integrated Circuit Technology, Proceedings, Shanghai, 2007, pp. 709-712.
  • 30
    • 50249122655 scopus 로고    scopus 로고
    • G. Molas, M. Bocquet, J. Buckley, J.P. Colonna, L. Masarotto, H. Grampeix, F. Martin, V. Vidal, A. Toffoli, P. Brianceau, L. Vermande, P. Scheiblin, A.M. Papon, G. Auvert, L. Perniola, C. Licitra, T. Veyron, N. Rochat, C. Bongiorno, S. Lombardo, B. De Salvo, S. Deleonibus, Thorough investigation of Si-nanocrystal memories with high-k interpoly dielectrics for sub-45 nm node flash NAND applications, in: Technical Digest - International Electron Devices Meeting, IEDM, Washington, DC, 2007, pp. 453-456.
    • G. Molas, M. Bocquet, J. Buckley, J.P. Colonna, L. Masarotto, H. Grampeix, F. Martin, V. Vidal, A. Toffoli, P. Brianceau, L. Vermande, P. Scheiblin, A.M. Papon, G. Auvert, L. Perniola, C. Licitra, T. Veyron, N. Rochat, C. Bongiorno, S. Lombardo, B. De Salvo, S. Deleonibus, Thorough investigation of Si-nanocrystal memories with high-k interpoly dielectrics for sub-45 nm node flash NAND applications, in: Technical Digest - International Electron Devices Meeting, IEDM, Washington, DC, 2007, pp. 453-456.
  • 35
    • 77950148571 scopus 로고    scopus 로고
    • D.C. Gilmer, N. Goel, S. Verma, H. Park, C. Park, G. Bersuker, P.D. Kirsch, K.C. Saraswat, R. Jammy, Band engineered tunnel oxides for improved TANOS-type flash program/erase with good retention and 100 K cycle endurance, in: VLSI Technology, Systems, and Applications, 2009. VLSI-TSA '09. International Symposium on 2009, pp. 156-157.
    • D.C. Gilmer, N. Goel, S. Verma, H. Park, C. Park, G. Bersuker, P.D. Kirsch, K.C. Saraswat, R. Jammy, Band engineered tunnel oxides for improved TANOS-type flash program/erase with good retention and 100 K cycle endurance, in: VLSI Technology, Systems, and Applications, 2009. VLSI-TSA '09. International Symposium on 2009, pp. 156-157.
  • 41
    • 77649237421 scopus 로고    scopus 로고
    • P. Blomme, B. Govoreanu, M. Rosmeulen, A. Akheyar, L. Haspeslagh, J. De Vos, M. Lorenzini, J. Van Houdt, K. De Meyer, High-k materials for tunnel barrier engineering in floating-gate flash memories, in: Meeting Abstracts, Los Angeles, CA, 2005, p. 973.
    • P. Blomme, B. Govoreanu, M. Rosmeulen, A. Akheyar, L. Haspeslagh, J. De Vos, M. Lorenzini, J. Van Houdt, K. De Meyer, High-k materials for tunnel barrier engineering in floating-gate flash memories, in: Meeting Abstracts, Los Angeles, CA, 2005, p. 973.
  • 44
    • 33847750682 scopus 로고    scopus 로고
    • y/high-k gate stack for enhanced device threshold voltage stability and performance, in: Technical Digest - International Electron Devices Meeting, IEDM, 2005, pp. 696-699.
    • y/high-k gate stack for enhanced device threshold voltage stability and performance, in: Technical Digest - International Electron Devices Meeting, IEDM, 2005, pp. 696-699.


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.