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Volumn 30, Issue 5, 2009, Pages 568-570

Select device disturb phenomenon in TANOS NAND flash memories

Author keywords

Charge trap (CT); Cycling; Disturb; Erase; NAND; Nonvolatile memory devices; Select device

Indexed keywords

CHARGE TRAP (CT); CYCLING; DISTURB; ERASE; NAND; NONVOLATILE MEMORY DEVICES; SELECT DEVICE;

EID: 65949104513     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2009.2017497     Document Type: Article
Times cited : (5)

References (11)
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  • 2
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    • J.-D. Lee, C.-K. Lee, M.-W. Lee, H.-S. Kim, K.-C. Park, and W.-S. Lee, "A new programming disturbance phenomenon in NAND flash memory by source/drain hot-electrons generated by GIDL current," in Proc. NVSM Workshop, Aug. 2006, pp. 31-33.
    • (2006) Proc. NVSM Workshop , pp. 31-33
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  • 6
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    • H. Bachhofer, H. Reisinger, E. Bertagnolli, and H. von Philipsborn, "Transient conduction in multidielectric silicon-oxide-nitride-oxide-semiconductor structures," J. Appl. Phys., vol. 89, no. 5, pp. 2791-2800, Mar. 2001.
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  • 11
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    • Scalable wordline shielding scheme using dummy cell beyond 40 nm NAND flash memory for eliminating abnormal disturb of edge memory cell
    • K.-T. Park, S. Lee, J.-S. Sel, J. Choi, and K. Kim, "Scalable wordline shielding scheme using dummy cell beyond 40 nm NAND flash memory for eliminating abnormal disturb of edge memory cell," Jpn. J. Appl. Phys., vol. 46, no. 4B, pp. 2188-2192, 2007.
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.