Modeling TANOS memory program transients to investigate charge-trapping dynamics

IEEE Electron Device Letters

Volumn 30, Issue 8, 2009, Pages 882-884

  Padovani, Andrea ^a,b   Larcher, Luca ^a,b   Heh, Dawei ^c   Bersuker, Gennadi ^c  

^a UNIVERSITY OF MODENA AND REGGIO EMILIA   (Italy)

^b UNIVERSITY OF BOLOGNA   (Italy)

^c SEMATECH   (United States)

Author keywords

Charge trapping memory; Device physics; Flash memory; Nitride based trapping storage; Shockley Read Hall (SRH); TANOS

Indexed keywords

CHARGE-TRAPPING MEMORY; DE-TRAPPING; DEVICE PHYSICS; DRIFT-DIFFUSION MODEL; ELECTRON TRAPPING; INJECTED ELECTRONS; PHYSICAL CHARACTERISTICS; PHYSICS-BASED; SHOCKLEY-READ-HALL (SRH); TANOS; TRAP-TO-BAND TUNNELING; TRAPPING LAYERS;

FLASH MEMORY; MODELS; NITRIDES; SEMICONDUCTOR QUANTUM DOTS; TRANSIENTS;

CHARGE TRAPPING;

EID: 68249146434     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2009.2024622     Document Type: Article

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