Defect passivation with fluorine in a TaxCy/High-K gate stack for enhanced device threshold voltage stability and performance

Technical Digest - International Electron Devices Meeting, IEDM

Volumn 2005, Issue , 2005, Pages 696-699

  Tseng, H H ^a   Tobin, P J ^a   Hebert, E A ^a   Kalpat, S ^a   Ramon M E ^a   Fonseca, L ^a   Jiang, Z X ^a   Schaeffer, J K ^a   Hegde, R I ^a   Triyoso, D H ^a   Gilmer, D C ^a   Taylor, W J ^a   Capasso, C C ^a   Adetutu, O ^a   Sing, D ^a   Conner, J ^a   Luckowski, E ^a   Chan, B W ^a   Haggag, A ^a   Backer, S ^a   Noble, R ^a   Jahanbani, M ^a   Chiu, Y H ^b   White, B E ^a   more..

^a FREESCALE SEMICONDUCTOR INC   (United States)

^b TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

GATE STACKS; PERFORMANCE DEGRADATION; THRESHOLD VOLTAGE INSTABILITY;

ELECTRON MOBILITY; PASSIVATION; POLYSILICON; TANTALUM COMPOUNDS; THRESHOLD VOLTAGE; VOLTAGE CONTROL;

GATES (TRANSISTOR);

EID: 33847750682     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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