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Volumn 55, Issue 9, 2008, Pages 2297-2306

Benchmarking of scaled InGaAs implant-free NanoMOSFETs

Author keywords

InGaAs MOSFETs; Monte Carlo (MC) simulations; Performance; Thin body architecture; Variability

Indexed keywords

INGAAS MOSFETS; MONTE CARLO (MC) SIMULATIONS; PERFORMANCE; THIN-BODY ARCHITECTURE; VARIABILITY;

EID: 50549093558     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2008.927658     Document Type: Article
Times cited : (43)

References (50)
  • 2
    • 50549094029 scopus 로고    scopus 로고
    • 2/TiN gate stack, in IEDM Tech. Dig., Dec. 8-10, 2003, pp. 28.1.1-28.1.4.
    • 2/TiN gate stack," in IEDM Tech. Dig., Dec. 8-10, 2003, pp. 28.1.1-28.1.4.
  • 3
    • 50549085268 scopus 로고    scopus 로고
    • K. Rim, K. Chan, L. Shi, D. Boyd, J. Ott, N. Klymko, F. Cardone, L. Tai, S. Koester, M. Cobb, D. Canaperi, B. To, E. Duch, I. Babich, R. Carruthers, P. Saunders, G. Walker, Y. Zhang, M. Steen, and M. Ieong, Fabrication and mobility characteristics of ultra-thin strained Si directly on insulator (SSDOI) MOSFETs, in IEDM Tech. Dig., Dec. 8-10, 2003, pp. 3.1.1-3.1.4.
    • K. Rim, K. Chan, L. Shi, D. Boyd, J. Ott, N. Klymko, F. Cardone, L. Tai, S. Koester, M. Cobb, D. Canaperi, B. To, E. Duch, I. Babich, R. Carruthers, P. Saunders, G. Walker, Y. Zhang, M. Steen, and M. Ieong, "Fabrication and mobility characteristics of ultra-thin strained Si directly on insulator (SSDOI) MOSFETs," in IEDM Tech. Dig., Dec. 8-10, 2003, pp. 3.1.1-3.1.4.
  • 4
    • 17644429488 scopus 로고    scopus 로고
    • B. Doris, M. Ieong, H. Zhu, Y. Zhang, M. Steen, W. Natzle, S. Callegari, V. Narayanan, J. Cai, S. H. Ku, P. Jamison, Y. Li, Z. Ren, V. Ku, D. Boyd, T. Kanarsky, C. D'Emic, M. Newport, D. Dobuzinsky, S. Deshpande, J. Petrus, R. Jammy, and W. Haensch, Device design considerations for ultra-thin SOI MOSFETs, in IEDM Tech. Dig., Dec. 8-10, 2003, pp. 27.3.1-27.3.4.
    • B. Doris, M. Ieong, H. Zhu, Y. Zhang, M. Steen, W. Natzle, S. Callegari, V. Narayanan, J. Cai, S. H. Ku, P. Jamison, Y. Li, Z. Ren, V. Ku, D. Boyd, T. Kanarsky, C. D'Emic, M. Newport, D. Dobuzinsky, S. Deshpande, J. Petrus, R. Jammy, and W. Haensch, "Device design considerations for ultra-thin SOI MOSFETs," in IEDM Tech. Dig., Dec. 8-10, 2003, pp. 27.3.1-27.3.4.
  • 5
    • 50549094662 scopus 로고    scopus 로고
    • soi-induced scattering, in IEDM Tech. Dig., Dec. 8-10, 2003, pp. 33.5.1-33.5.4.
    • soi-induced scattering," in IEDM Tech. Dig., Dec. 8-10, 2003, pp. 33.5.1-33.5.4.
  • 6
    • 50549099856 scopus 로고    scopus 로고
    • J. Kedzierski, D. M. Fried, E. J. Nowak, T. Kanarsky, J. Rankin, H. Hanafi, W. Natzle, D. Boyd, R. A. Roy, J. Newbury, Y. Zhang, C. Yu, Q. Yang, P. Saunders, C. P. Willets, A. Johnson, S. P. Cole, H. E. Young, N. Carpenter, D. Rakowski, B. A. Rainey, P. E. Cottrell, M. Ieong, and H.-S. P. Wong, High-performance symmetric-gate and CMOS-compatible Vt asymmetric gate FinFET devices, in IEDM Tech. Dig., Dec. 2-5, 2001, pp. 19.5.1-19.5.4.
    • J. Kedzierski, D. M. Fried, E. J. Nowak, T. Kanarsky, J. Rankin, H. Hanafi, W. Natzle, D. Boyd, R. A. Roy, J. Newbury, Y. Zhang, C. Yu, Q. Yang, P. Saunders, C. P. Willets, A. Johnson, S. P. Cole, H. E. Young, N. Carpenter, D. Rakowski, B. A. Rainey, P. E. Cottrell, M. Ieong, and H.-S. P. Wong, "High-performance symmetric-gate and CMOS-compatible Vt asymmetric gate FinFET devices," in IEDM Tech. Dig., Dec. 2-5, 2001, pp. 19.5.1-19.5.4.
  • 9
    • 27144542816 scopus 로고    scopus 로고
    • Methodology for development of high-κ stacked gate dielectrics on III-V semiconductors
    • A. A. Demkov and A. Navrotsky, Eds. Dordrecht, Germany: Springer-Verlag
    • M. Passlack, "Methodology for development of high-κ stacked gate dielectrics on III-V semiconductors," in Materials Fundamentals of Gate Dielectrics, A. A. Demkov and A. Navrotsky, Eds. Dordrecht, Germany: Springer-Verlag, 2005, pp. 403-467.
    • (2005) Materials Fundamentals of Gate Dielectrics , pp. 403-467
    • Passlack, M.1
  • 13
    • 50549097283 scopus 로고    scopus 로고
    • High performance III-V MOSFETs: A dream close to reality?
    • M. Missous, Ed. Manchester, U.K, Nov. 18-19
    • K. Kalna, L. Yang, and A. Asenov, "High performance III-V MOSFETs: A dream close to reality?" in Proc. 10th IEEE Int. Symp. EDMO Appl. M. Missous, Ed. Manchester, U.K., Nov. 18-19, 2002, pp. 243-248.
    • (2002) Proc. 10th IEEE Int. Symp. EDMO Appl , pp. 243-248
    • Kalna, K.1    Yang, L.2    Asenov, A.3
  • 14
    • 1942420687 scopus 로고    scopus 로고
    • Monte Carlo simulations of III-V MOSFETs
    • Apr
    • K. Kalna, M. Boriçi, L. Yang, and A. Asenov, "Monte Carlo simulations of III-V MOSFETs," Semicond. Sci. Technol., vol. 19, no. 4, pp. S202-S205, Apr. 2004.
    • (2004) Semicond. Sci. Technol , vol.19 , Issue.4
    • Kalna, K.1    Boriçi, M.2    Yang, L.3    Asenov, A.4
  • 15
    • 33751414042 scopus 로고    scopus 로고
    • K. Kalna, L. Yang, A. Asenov, Monte Carlo simulations of sub-100 nm InGaAs MOSFETs for digital applications, in Proc. 37th ESSDERC, G. Ghibaudo, T, Skotnicki, S. Cristoloveanu, and M. Brillouët, Eds. Grenoble, France, 2005, pp. 169-172.
    • K. Kalna, L. Yang, A. Asenov, "Monte Carlo simulations of sub-100 nm InGaAs MOSFETs for digital applications," in Proc. 37th ESSDERC, G. Ghibaudo, T, Skotnicki, S. Cristoloveanu, and M. Brillouët, Eds. Grenoble, France, 2005, pp. 169-172.
  • 16
    • 0026121721 scopus 로고
    • Monte Carlo simulation of transport in technologically significant semiconductors of the diamond and zinc-blende structures. II. Submicrometer MOSFETs
    • Mar
    • M. V. Fischetti and S. E. Laux, "Monte Carlo simulation of transport in technologically significant semiconductors of the diamond and zinc-blende structures. II. Submicrometer MOSFETs," IEEE Trans. Electron Devices, vol. 38, no. 3, pp. 650-660, Mar. 1991.
    • (1991) IEEE Trans. Electron Devices , vol.38 , Issue.3 , pp. 650-660
    • Fischetti, M.V.1    Laux, S.E.2
  • 17
    • 0035717885 scopus 로고    scopus 로고
    • P. M. Solomon and S. E. Laux, The ballistic FET: Design, capacitance and speed limit, in IEDM Tech. Dig., Dec. 2-5, 2001, pp. 5.1.1-5.1.4.
    • P. M. Solomon and S. E. Laux, "The ballistic FET: Design, capacitance and speed limit," in IEDM Tech. Dig., Dec. 2-5, 2001, pp. 5.1.1-5.1.4.
  • 18
    • 24944459065 scopus 로고    scopus 로고
    • Thirty years of Monte Carlo simulations of electronic transport in semiconductors: Their relevance to science and to mainstream VLSI technology
    • Oct
    • M. V. Fischetti, S. E. Laux, P. M. Solomon, and A. Kumar, "Thirty years of Monte Carlo simulations of electronic transport in semiconductors: Their relevance to science and to mainstream VLSI technology," J. Comput. Electron., vol. 3 no. 3/4, pp. 287-293, Oct. 2004.
    • (2004) J. Comput. Electron , vol.3 , Issue.3-4 , pp. 287-293
    • Fischetti, M.V.1    Laux, S.E.2    Solomon, P.M.3    Kumar, A.4
  • 19
    • 41749085181 scopus 로고    scopus 로고
    • A simulation study of the switching times of 22- and 17-nm gate-length SOI nFETs on high mobility substrates and Si
    • Sep
    • S. E. Laux, "A simulation study of the switching times of 22- and 17-nm gate-length SOI nFETs on high mobility substrates and Si," IEEE Trans. Electron Devices, vol. 54, no. 9, pp. 2304-2320, Sep. 2007.
    • (2007) IEEE Trans. Electron Devices , vol.54 , Issue.9 , pp. 2304-2320
    • Laux, S.E.1
  • 20
    • 50249185663 scopus 로고    scopus 로고
    • Simulation of electron transport in high-mobility MOSFETs: Density of states bottleneck and 'source starvation'
    • Dec. 10-12
    • M. V. Fischetti, L. Wang, B. Yu, C. Sachs, P. M. Asbeck, Y. Taur, and M. Rodwell, "Simulation of electron transport in high-mobility MOSFETs: Density of states bottleneck and 'source starvation'," in IEDM Tech. Dig., Dec. 10-12, 2007, pp. 109-112.
    • (2007) IEDM Tech. Dig , pp. 109-112
    • Fischetti, M.V.1    Wang, L.2    Yu, B.3    Sachs, C.4    Asbeck, P.M.5    Taur, Y.6    Rodwell, M.7
  • 22
    • 0036568336 scopus 로고    scopus 로고
    • Scaling of pseudomorphic high electron mobility transistors to decanano dimensions
    • May
    • K. Kalna, S. Roy, A. Asenov, K. Elgaid, and I. G. Thayne, "Scaling of pseudomorphic high electron mobility transistors to decanano dimensions," Solid-State Electron., vol. 46, no. 5, pp. 631-638, May 2002.
    • (2002) Solid-State Electron , vol.46 , Issue.5 , pp. 631-638
    • Kalna, K.1    Roy, S.2    Asenov, A.3    Elgaid, K.4    Thayne, I.G.5
  • 23
    • 50549085491 scopus 로고    scopus 로고
    • U.S. Patent Publication
    • Jul. 15, No. 2004-0137673
    • M. Passlack, O. Hartin, M. Ray, and N. Medendorp, U.S. Patent Publication, Jul. 15, 2004. No. 2004-0137673.
    • (2004)
    • Passlack, M.1    Hartin, O.2    Ray, M.3    Medendorp, N.4
  • 26
    • 34249103333 scopus 로고    scopus 로고
    • Simulation of implant free III-V MOSFETs for high performance low power nano-CMOS applications
    • Sep./Oct
    • A. Asenov, K. Kalna, I. Thayne, and R. J. W. Hill, "Simulation of implant free III-V MOSFETs for high performance low power nano-CMOS applications," Microelectron. Eng., vol. 84, no. 8/9, pp. 2398-2403, Sep./Oct. 2007.
    • (2007) Microelectron. Eng , vol.84 , Issue.8-9 , pp. 2398-2403
    • Asenov, A.1    Kalna, K.2    Thayne, I.3    Hill, R.J.W.4
  • 27
    • 33847408311 scopus 로고    scopus 로고
    • 1-μm enhancement mode GaAs n-channel MOSFETs with transconductance exceeding 250 mS/mm
    • Feb
    • K. Rajagopalan, J. Abrokwah, R. Droopad, and M. Passlack, "1-μm enhancement mode GaAs n-channel MOSFETs with transconductance exceeding 250 mS/mm," IEEE Electron Device Lett., vol. 28, no. 2, pp. 100-102, Feb. 2007.
    • (2007) IEEE Electron Device Lett , vol.28 , Issue.2 , pp. 100-102
    • Rajagopalan, K.1    Abrokwah, J.2    Droopad, R.3    Passlack, M.4
  • 29
    • 39549093033 scopus 로고    scopus 로고
    • D. A. J. Moran, R. J. W. Hill, X. Li, H. Zhou, D. McIntyre, S. Thoms, R. Droopad, P. Zurcher, K. Rajagopalan, J. Abrokwah, M. Passlack, and I. G. Thayne, Sub-micron, metal gate, high-κ dielectric, implant-free, enhancement-mode III-V MOSFETs, in Proc. 37th ESSDERC, R. Thewes and D. Schmitt-Landsiedel, Eds., Münich, Germany, 2007, pp. 466-469.
    • D. A. J. Moran, R. J. W. Hill, X. Li, H. Zhou, D. McIntyre, S. Thoms, R. Droopad, P. Zurcher, K. Rajagopalan, J. Abrokwah, M. Passlack, and I. G. Thayne, "Sub-micron, metal gate, high-κ dielectric, implant-free, enhancement-mode III-V MOSFETs," in Proc. 37th ESSDERC, R. Thewes and D. Schmitt-Landsiedel, Eds., Münich, Germany, 2007, pp. 466-469.
  • 31
    • 34247598369 scopus 로고    scopus 로고
    • 180 nm metal gate, high-k dielectric, implant-free III-V MOSFETs with transconductance of over 425 μS/μm
    • Apr
    • R. J. W. Hill, D. A. J. Moran, X. Li, H. Zhou, D. Macintyre, S. Thoms, R. Droopad, M. Passlack, and I. G. Thayne, "180 nm metal gate, high-k dielectric, implant-free III-V MOSFETs with transconductance of over 425 μS/μm," Electron. Lett., vol. 43, no. 9, pp. 543-545, Apr. 2007.
    • (2007) Electron. Lett , vol.43 , Issue.9 , pp. 543-545
    • Hill, R.J.W.1    Moran, D.A.J.2    Li, X.3    Zhou, H.4    Macintyre, D.5    Thoms, S.6    Droopad, R.7    Passlack, M.8    Thayne, I.G.9
  • 32
    • 0032650215 scopus 로고    scopus 로고
    • Strain engineered pHEMTs on virtual substrates: A Monte Carlo simulation study
    • Jul
    • S. Babiker, A. Asenov, S. Roy, and S. P. Beaumont, "Strain engineered pHEMTs on virtual substrates: A Monte Carlo simulation study," Solid-State Electron., vol. 43, no. 7, pp. 1281-1288, Jul. 1999.
    • (1999) Solid-State Electron , vol.43 , Issue.7 , pp. 1281-1288
    • Babiker, S.1    Asenov, A.2    Roy, S.3    Beaumont, S.P.4
  • 33
    • 0013404040 scopus 로고    scopus 로고
    • M. Moško and A. Mošková, Ensemble Monte Carlo simulation of electron-electron scattering: Improvements of conventional methods, Phys. Rev. B, Condes. Matter, 44, no. 19, pp. 10 794-10 803, Nov. 1991.
    • M. Moško and A. Mošková, "Ensemble Monte Carlo simulation of electron-electron scattering: Improvements of conventional methods," Phys. Rev. B, Condes. Matter, vol. 44, no. 19, pp. 10 794-10 803, Nov. 1991.
  • 34
    • 0033908956 scopus 로고    scopus 로고
    • Integration of a particle-particle-particle-mesh algorithm with the ensemble Monte Carlo method for the simulation of ultra-small semiconductor devices
    • Feb
    • C. J. Wordelman and U. Ravaioli, "Integration of a particle-particle-particle-mesh algorithm with the ensemble Monte Carlo method for the simulation of ultra-small semiconductor devices," IEEE Trans. Electron Devices, vol. 47, no. 2, pp. 410-416, Feb. 2000.
    • (2000) IEEE Trans. Electron Devices , vol.47 , Issue.2 , pp. 410-416
    • Wordelman, C.J.1    Ravaioli, U.2
  • 35
    • 0000805233 scopus 로고    scopus 로고
    • Long-range Coulomb interactions in small Si devices. Part I: Performance and reliability
    • Jan
    • M. V. Fischetti and S. E. Laux, "Long-range Coulomb interactions in small Si devices. Part I: Performance and reliability," J. Appl. Phys., vol. 89, no. 2, pp. 1205-1231, Jan. 2001.
    • (2001) J. Appl. Phys , vol.89 , Issue.2 , pp. 1205-1231
    • Fischetti, M.V.1    Laux, S.E.2
  • 36
    • 84907687310 scopus 로고    scopus 로고
    • .48As HEMT technology utilizing a non-annealed ohmic contact strategy, in Proc. 35th ESSDERC, J. Franca and P. Freitas, Eds., Estoril, Portugal, 2003 pp. 315-318.
    • .48As HEMT technology utilizing a non-annealed ohmic contact strategy," in Proc. 35th ESSDERC, J. Franca and P. Freitas, Eds., Estoril, Portugal, 2003 pp. 315-318.
  • 37
    • 33747444606 scopus 로고    scopus 로고
    • K. Kalna, K. Elgaid, I. Thayne, and A. Asenov, Modelling of InP HEMTs with high Indium content channels, in Proc. 17th Indium Phosphite Relat. Mater. Conf., Marsh and I. Thayne, Eds., Glasgow, U.K., 2005, pp. 61-65.
    • K. Kalna, K. Elgaid, I. Thayne, and A. Asenov, "Modelling of InP HEMTs with high Indium content channels," in Proc. 17th Indium Phosphite Relat. Mater. Conf., Marsh and I. Thayne, Eds., Glasgow, U.K., 2005, pp. 61-65.
  • 39
    • 0033749512 scopus 로고    scopus 로고
    • The onset of quantization in ultra-submicron semiconductor devices
    • Feb
    • D. K. Ferry, "The onset of quantization in ultra-submicron semiconductor devices," Superlattices Microstruct., vol. 27, no. 2/3, pp. 61-66, Feb. 2000.
    • (2000) Superlattices Microstruct , vol.27 , Issue.2-3 , pp. 61-66
    • Ferry, D.K.1
  • 40
    • 33947211936 scopus 로고    scopus 로고
    • 50-nm self-aligned and 'standard' T-gate InP pHEMT comparison: The influence of parasitics on performance at the 50-nm node
    • Dec
    • D. Moran, H. McLelland, K. Elgaid, G. Whyte, C. R. Stanley, and I. Thayne, "50-nm self-aligned and 'standard' T-gate InP pHEMT comparison: The influence of parasitics on performance at the 50-nm node," IEEE Trans. Electron Devices, vol. 53, no. 12, pp. 2920-2926, Dec. 2006.
    • (2006) IEEE Trans. Electron Devices , vol.53 , Issue.12 , pp. 2920-2926
    • Moran, D.1    McLelland, H.2    Elgaid, K.3    Whyte, G.4    Stanley, C.R.5    Thayne, I.6
  • 41
    • 33947655458 scopus 로고    scopus 로고
    • Impact of intrinsic parameter fluctuations on the performance of HEMTs studied with a 3D parallel drift-diffusion simulator
    • Mar
    • N. Seoane, A. J. Garcia-Loureiro, K. Kalna, and A. Asenov, "Impact of intrinsic parameter fluctuations on the performance of HEMTs studied with a 3D parallel drift-diffusion simulator," Solid-State Electron. vol. 51, no. 3, pp. 481-488, Mar. 2007.
    • (2007) Solid-State Electron , vol.51 , Issue.3 , pp. 481-488
    • Seoane, N.1    Garcia-Loureiro, A.J.2    Kalna, K.3    Asenov, A.4
  • 42
    • 35148895067 scopus 로고    scopus 로고
    • Atomistic effect of delta doping layer in a 50 nm InP HEMT
    • Jul
    • N. Seoane, A. J. Garcia-Loureiro, K. Kalna, and A. Asenov, "Atomistic effect of delta doping layer in a 50 nm InP HEMT," J. Comput. Electron., vol. 5, no. 2/3, pp. 131-135, Jul. 2006.
    • (2006) J. Comput. Electron , vol.5 , Issue.2-3 , pp. 131-135
    • Seoane, N.1    Garcia-Loureiro, A.J.2    Kalna, K.3    Asenov, A.4
  • 44
    • 0027813761 scopus 로고
    • Three-dimensional 'Atomistic' simulation of discrete microscopic random dopant distribution effects in sub-0.1 μm MOSFETs
    • Dec. 8-10
    • H.-S. P. Wong and Y. Taur, "Three-dimensional 'Atomistic' simulation of discrete microscopic random dopant distribution effects in sub-0.1 μm MOSFETs," in IEDM Tech. Dig., Dec. 8-10, 1993, pp. 705-708.
    • (1993) IEDM Tech. Dig , pp. 705-708
    • Wong, H.-S.P.1    Taur, Y.2
  • 45
    • 44849131962 scopus 로고    scopus 로고
    • Simulation of statistical variability in nano MOSFETs
    • Jun
    • A. Asenov, "Simulation of statistical variability in nano MOSFETs," in VLSI Symp. Tech. Dig., Jun. 2006, pp. 86-87.
    • (2006) VLSI Symp. Tech. Dig , pp. 86-87
    • Asenov, A.1
  • 46
    • 24944462739 scopus 로고    scopus 로고
    • A. J. Garcia-Loureiro, K. Kalna, and A. Asenov, Efficient three-dimensional parallel simulations of PHEMTs, Int. J. Numer. Model.-Electron. Netw. Device Fields, 18, no. 5, pp. 327-340, Sep./Oct. 2005.
    • A. J. Garcia-Loureiro, K. Kalna, and A. Asenov, "Efficient three-dimensional parallel simulations of PHEMTs," Int. J. Numer. Model.-Electron. Netw. Device Fields, vol. 18, no. 5, pp. 327-340, Sep./Oct. 2005.
  • 47
    • 34248674625 scopus 로고    scopus 로고
    • Statistical study of the effect of interface charge fluctuations in HEMTs using a 3D simulator
    • Dec
    • N. Seoane, A. J. Garcia-Loureiro, K. Kalna, and A. Asenov, "Statistical study of the effect of interface charge fluctuations in HEMTs using a 3D simulator," J. Comput. Electron., vol. 5, no. 4, pp. 385-388, Dec. 2006.
    • (2006) J. Comput. Electron , vol.5 , Issue.4 , pp. 385-388
    • Seoane, N.1    Garcia-Loureiro, A.J.2    Kalna, K.3    Asenov, A.4
  • 49
    • 0032320827 scopus 로고    scopus 로고
    • Random dopant induced threshold voltage lowering and fluctuations in sub-0.1 μm MOSFETs: A 3-D 'atomistic' simulation study
    • Dec
    • A. Asenov, "Random dopant induced threshold voltage lowering and fluctuations in sub-0.1 μm MOSFETs: A 3-D 'atomistic' simulation study," IEEE Trans. Electron Devices, vol. 45, no. 12, pp. 2505-2513, Dec. 1998.
    • (1998) IEEE Trans. Electron Devices , vol.45 , Issue.12 , pp. 2505-2513
    • Asenov, A.1
  • 50
    • 33947265310 scopus 로고    scopus 로고
    • Simulation study of individual and combined Sources of intrinsic parameter fluctuations in conventional nano-MOSFETs
    • Dec
    • G. Roy, A. R. Brown, F. Adamu-Lema, S. Roy, and A. Asenov, "Simulation study of individual and combined Sources of intrinsic parameter fluctuations in conventional nano-MOSFETs," IEEE Trans. Electron Devices, vol. 53, no. 12, pp. 3063-3070, Dec. 2006.
    • (2006) IEEE Trans. Electron Devices , vol.53 , Issue.12 , pp. 3063-3070
    • Roy, G.1    Brown, A.R.2    Adamu-Lema, F.3    Roy, S.4    Asenov, A.5


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