Monte carlo simulations of high-performance implant free In 0.3Ga0.7As nano-MOSFETs for low-power CMOS applications

IEEE Transactions on Nanotechnology

Volumn 6, Issue 1, 2007, Pages 106-112

  Kalna, Karol ^b   Wilson, James A ^b   Moran, David A J ^b   Hill, Richard J W ^b   Long, Andrew R ^b   Droopad, Ravi ^a,c   Passlack, Matthias ^a,c   Thayne, Iain G ^b   Asenov, Asen ^a,b  

^a IEEE

^b UNIVERSITY OF GLASGOW   (United Kingdom)

^c FREESCALE SEMICONDUCTOR INC   (United States)

Author keywords

High performance; Implant free; InGaAs nano MOSFETs; Monte Carlo simulation

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; DIELECTRIC DEVICES; ELECTRON MOBILITY; GATES (TRANSISTOR); NANOSTRUCTURED MATERIALS; SEMICONDUCTING INDIUM GALLIUM ARSENIDE;

DEVICE SIMULATIONS; GATE LENGTH DEVICES; GATE LENGTH IMPLANT; SHEET DENSITY;

MOSFET DEVICES;

EID: 33846666180     PISSN: 1536125X     EISSN: None     Source Type: Journal    
DOI: 10.1109/TNANO.2006.888543     Document Type: Article

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