Atomic-layer deposited high-k/III-V metal-oxide-semiconductor devices and correlated empirical model

Fundamentals of III-V Semiconductor MOSFETs

Volumn , Issue , 2010, Pages 173-193

  Ye, Peide D ^a   Xuan, Yi ^a   Wu, Yanqing ^a   Xu, Min ^b  

^a PURDUE UNIVERSITY   (United States)

^b The Department of Mechanical Engineering   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ATOMIC LAYER DEPOSITION; DIELECTRIC DEVICES; DIELECTRIC MATERIALS; DIELECTRIC PROPERTIES; GALLIUM COMPOUNDS; GATE DIELECTRICS; HETEROJUNCTIONS; HIGH-K DIELECTRIC; III-V SEMICONDUCTORS; METALS; MOLECULAR BEAMS; MOS DEVICES; OXIDE SEMICONDUCTORS; SEMICONDUCTOR DEVICE MODELS; SUBSTRATES; SURFACE CHEMISTRY; TRANSISTORS;

ATOMIC LAYER DEPOSITED; CONDUCTION-BAND MINIMUM; DEVICE PERFORMANCE; INTERFACE TRAP DENSITY; RESEARCH EFFORTS; SURFACE PRE-TREATMENTS; TECHNOLOGY NODES; VALENCE-BAND MAXIMUMS;

MOSFET DEVICES;

EID: 84892310800     PISSN: None     EISSN: None     Source Type: Book    
DOI: 10.1007/978-1-4419-1547-4_7     Document Type: Chapter

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