GaAs MOSFET with oxide gate dielectric grown by atomic layer deposition

IEEE Electron Device Letters

Volumn 24, Issue 4, 2003, Pages 209-211

  Ye, P D ^a   Wilk, G D ^a   Kwo, J ^a   Yang, B ^a   Gossmann, H J L ^a   Frei, M ^a   Chu, S N G ^a   Mannaerts, J P ^a   Sergent, M ^a   Hong, M ^a   Ng, K K ^a   Bude, J ^a  

^a AGERE SYSTEMS   (United States)

Author keywords

Atomic layer deposition; Depletion mode; GaAs MOSFET

Indexed keywords

ALUMINA; CURRENT DENSITY; DEPOSITION; DIELECTRIC MATERIALS; GATES (TRANSISTOR); HYSTERESIS; LEAKAGE CURRENTS; PASSIVATION; SEMICONDUCTING GALLIUM ARSENIDE; SEMICONDUCTOR GROWTH; SHORT CIRCUIT CURRENTS; TRANSCONDUCTANCE;

ATOMIC LAYER DEPOSITION; DEPLETION MODE; OXIDE GATE DIELECTRIC;

MOSFET DEVICES;

EID: 0037766787     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2003.812144     Document Type: Letter

References (21)

1. T. Mimura and M. Fukuta, "Status of the GaAs metal-oxide-semiconductor technology," IEEE Trans. Electron Devices, vol. ED-27, pp. 1147-1155, 1980.
2. C. W. Wilmsen, Ed., Physics and Chemistry of III-V Compound Semiconductor Interfaces. New York: Plenum.
3. M. Hong, C. T. Liu, H. Reese, and J. Kwo, "Semiconductor-insulator interfaces," in Encyclopedia of Electrical and Electronics Engineering, J. G. Webster, Ed. New York: Wiley, vol. 19, pp. 87-100.
4. S. Tiwari, S. L. Wright, and J. Batey, "Unpinned GaAs MOS capacitors and transistors," IEEE Electron Device Lett., vol. 9, pp. 488-490, Sept. 1988.
5. C. L. Chen, F. W. Smith, B. J. Clifton, L. J. Mahoney, M. F. Manfra, and A. R. Calawa, "High-Power-Density GaAs MISFETs with a low-temperature-grown epitaxial layer as the insulator," IEEE Electron Device Lett., vol. 12, pp. 306-308, June 1991.
6. 5 film," IEEE Electron Device Lett., vol. 15, pp. 251-253, May 1994.
7. 1-xAs-GaAs metal-oxide semiconductor field effect transistors formed by lateral water vapor oxidation of AlAs," Appl. Phys. Lett., vol. 66, pp. 2688-2690, 1995.
8. J. Y. Wu, H. H. Wang, Y. H. Wang, and M. P. Houng, "A GaAs MOSFET with a liquid phase oxidized gate," IEEE Electron Device Lett., vol. 20, pp. 18-20, Jan. 1999.
9. 2 gate insulator layer," IEEE Electron Device Lett., vol. 9, pp. 548-549, Oct. 1988.
10. 1-xAs (χ ∼ 1) through the use of AlAs/GaAs digital alloys," Appl. Phys. Lett., vol. 76, pp. 2544-2546, 2000.
11. 0.02As layers due to the presence of low-temperature-grown GaAs," Appl. Phys. Lett., vol. 77, pp. 205-207, 2000.
12. 3 grown by molecular beam reaction," Surf. Sci., vol. 86, pp. 835-840, 1979.
13. 4/Si/Ge/GaAs metal-insulator-semiconductor structures grown by in situ chemical vapor deposition," J. Appl. Phys., vol. 75, pp. 1826-1828, 1994.
14. M. Hong, M. Passlack, J. P. Mannaerts, J. Kwo, S. N. G. Chu, N. Moriya, S. Y. Hou, and V. J. Fratello, "Low interface state density oxide-GaAs structures fabricated by in situ molecular beam epitaxy," J. Vac. Sci. Technol. B, vol. 14, pp. 2297-2300, 1996.
15. 3-GaAs interfaces: Fabrication, characterization, and modeling," IEEE Trans. Electron Devices, vol. 44, pp. 214-225, Feb. 1997.
16. M. Hong et al., "Epitaxial cubic Gadolinium oxide as a dielectric for Gallium Arsenide passivation," Science, vol. 283, pp. 1897-1900, 1999.
17. x, 0 < x < 1.0 films," Appl. Phys. Lett., vol. 75, pp. 1116-1118, 1999.
18. 3) as gate oxide," Solid-State Electron., vol. 41, pp. 1751-1753, 1997.
19. Y. C. Wang et al., "Demonstration of submicron depletion-mode GaAs MOSFETs with negligible drain current drift and hysteresis," IEEE Electron Device Lett., vol. 20, pp. 457-459, Sept. 1999.
20. M. Passlack et al., "Self-aligned GaAs p-channel enhancement mode MOS heterostructure field-effect transistor," IEEE Electron Device Lett., vol. 23, pp. 508-510, Sept. 2002.
21. G. D. Wilk, R. M. Wallace, and J. M. Anthony, "High-k gate dielectrics: Current status and materials properties considerations," J. Appl. Phys., vol. 89, pp. 5243-5275, 2001.