Grinding of silicon wafers: A review from historical perspectives

International Journal of Machine Tools and Manufacture

Volumn 48, Issue 12-13, 2008, Pages 1297-1307

  Pei, Z J ^a   Fisher, Graham R ^b   Liu, J ^a,c  

^a Kansas State University   (United States)

^b MEMC Electronic Materials Inc   (United States)

^c HUAQIAO UNIVERSITY   (China)

Author keywords

Grinding; Lapping; Machining; Polishing; Semiconductor material; Silicon wafer

Indexed keywords

ARSENIC COMPOUNDS; CORUNDUM; GALLIUM; GALLIUM ALLOYS; GALLIUM COMPOUNDS; GERMANIUM; GRINDING (COMMINUTION); GRINDING (MACHINING); LITHIUM; MACHINING; MACHINING CENTERS; NIOBIUM COMPOUNDS; NONMETALS; SEMICONDUCTING SILICON; SEMICONDUCTING SILICON COMPOUNDS; SEMICONDUCTOR DEVICE MANUFACTURE; SEMICONDUCTOR DEVICE MODELS; SEMICONDUCTOR DEVICES; SILICON; SILICON CARBIDE;

GALLIUM ARSENIDE (GAAS); HIGH QUALITY (HQ); LITHIUM NIOBATE (LN); MACHINING PROCESSES; READERS (USER EXPERIENCE); RESEARCH AND DEVELOPMENT; SILICON WAFER MANUFACTURING; WAFER SIZES;

SILICON WAFERS;

EID: 48549090576     PISSN: 08906955     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.ijmachtools.2008.05.009     Document Type: Review

References (107)

1. May G.S., and Sze S.M. Fundamentals of Semiconductor Fabrication (2004), Wiley, New York p. 1
2. Van Zant P. Microchip Fabrication (2000), McGraw-Hill, New York p. 37
3. iSuppli, 2007 and 2008 semiconductor forecast adjustments, January 15, 2008, retrieved from: 〈www.semiconductors.tekrati.com/research/9887/〉.
4. SEMI, Silicon wafer shipments experience growth for the sixth year in a row, retrieved from: 〈www.wps2a.semi.org/wps/portal/_pagr/103/_pa.103/248?dFormat=application/msword&docName=P043260〉.
5. International Technology Roadmap for Semiconductors, retrieved from: 〈http://www.itrs.net/home.html〉.
6. SEMI, Specifications for polished mono-crystalline silicon wafers, SEMI M1-0600, Semiconductor Equipment and Materials International, San Jose, CA, 2000.
7. SEMI, Guide for reporting wafer nanotopography, SEMI M43-0301, Semiconductor Equipment and Materials International, San Jose, CA, 2001.
8. MEMC, Wafer nanotopography, retrieved from: 〈http://www.memc.com/t-wafer-nanotopography.asp〉.
9. K. Asakawa, Production method for semiconductor wafer, US Patent Application Publication, US 20072/0023395 A1, February 1, 2007.
10. J. Kishimoto, Semiconductor wafer and method for fabrication thereof, US Patent Application Publication, US 2002/00037650 A1, March 28, 2002.
11. S. Koyata, T. Hashii, K. Murayama, K. Takaishi, T. Katoh, Process for producing wafer, US Patent Application Publication, US 20072/0042567 A1, February 22, 2007.
12. M. Kulkarni, A. Desai, Silicon wafering process flow, US Patent 6294469, 2001.
13. J. Vasat, A. Stefanescu, T. Hanley, Semiconductor wafer manufacturing process, US Patent Application Publication, US 2002/0004305 A1, January 10, 2002.
14. Sreejith P.S., Udupa G., Noor Y.B.M., and Ngoi B.K.A. Recent advances in machining of silicon wafers for semiconductor applications. International Journal of Advanced Manufacturing Technology 17 3 (2001) 157-162
15. Kang R.K., Tian Y.B., Guo D.M., and Jin Z.J. Present status of research and application in ultra-precision grinding technology of large-scale silicon wafers. Diamond and Abrasives Engineering 136 4 (2003) 13-18 (in Chinese)
16. Ahearne E., and Byrne G. Ultraprecision grinding technologies in silicon semiconductor processing. Proceedings of the Institution of Mechanical Engineers, Part B: Journal of Engineering Manufacture 218 3 (2004) 253-267
17. Li Z.C., Pei Z.J., and Fisher G.R. Simultaneous double side grinding of silicon wafers: a literature review. International Journal of Machine Tools and Manufacture 46 12-13 (2006) 1449-1458
18. Liu J.H., Pei Z.J., and Fisher G.R. ELID grinding of silicon wafers: a literature review. International Journal of Machine Tools and Manufacture 47 3-4 (2007) 529-536
19. Liu J.H., Pei Z.J., and Fisher G.R. Grinding wheels for manufacturing of silicon wafers: a literature review. International Journal of Machine Tools and Manufacture 47 1 (2007) 1-13
20. R. Vandamme, Y. Xin, Z.J. Pei, Method of processing semiconductor wafers, US Patent 6114245, 2000.
21. Bawa M.S., Petro E.F., and Grimes H.M. Fracture strength of large diameter silicon wafers. Semiconductor International 18 11 (1995) 115-118
22. T. Fukami, H. Masumura, K. Suzuki, H. Kudo, Method of manufacturing semiconductor mirror wafers, US Patent 5821167, 1998.
23. Tonshoff H.K., Schmieden W.V., Inasaki I., Konig W., and Spur G. Abrasive machining of silicon. CIRP Annals 39 2 (1990) 621-630
24. T. Kato, H. Masumura, H. Kudo, Method of manufacturing semiconductor wafers, US Patent 5800725, 1998.
25. S. Chidambaram, Z.J. Pei, Q.X. Yu, Back grinding of semiconductor wafers, in: Proceedings of International Conference on Progress of Machining Technology, Xi'an, Shanxi, China, September 10-14, 2002, pp. 301-306.
26. Lewis S. Backgrinding wafers for maximum die strength. Semiconductor International 15 8 (1992) 86-89
27. Kang R.K., Guo D.M., Huo F.W., and Jin Z.J. Application and evolution of back grinding technology for large size wafer. Semiconductor Technology 28 9 (2003) 33-38 (in Chinese)
28. T. Yamano, Semiconductor device and method of fabricating the same, US Patent Application Publication, US 2007/0032066 A1, February 8, 2007.
29. McGrath D. Thinning wafers beyond CMP. Electronic News (July 6) (1998) 34-38
30. Fasca C. Claims "ultrasmooth" wafer shave. Electronic News (May 4) (1998) 51-65
31. M.K. Grief, J.A. Steele, Warpage of mechanical strength studies of ultra thin 150 mm wafers, in: Proceedings of the IEEE/CPMT International Electronics Manufacturing Technology (IEMT) Symposium, Austin, TX, October 14-16, 1996, pp. 190-194.
32. Konnemann G., and Wolf P. Thin grinding of semiconductor materials to 50 mm. Industrial Diamond Review 63 596 (2003) 53-55
33. McHatton C., and Gumbert C.M. Eliminating backgrind defects with wet chemical etching. Solid State Technology 41 11 (1998) 85-90
34. Schraub F.A.T. Automated handling of ultra-thin silicon wafers. Solid State Technology 45 9 (2002). Retrieved from 〈http://sst.pennnet.com〉
35. Savastiouk S., Siniaguine O., and Hammond M.L. Atmospheric downstream plasma-a new tool for semiconductor processing. Solid State Technology 41 7 (1998) 133-136
36. Savastiouk S., Siniaguine O., and Hammond M.L. Atmospheric downstream plasma. European Semiconductor 20 6 (1998) 31-33
37. T. Mori, Semiconductor wafer surface grinding apparatus, US Patent 4693036, 1987.
38. M. Nishiguchi, T. Sekiguchi, I. Miyoshi, K. Nishio, Surface grinding machine, US Patent 5035087, 1991.
39. S. Tabuchi, Grinding machine, US Patent 4481738, 1984.
40. Matsui S. An experimental study on the grinding of silicon wafers-the wafer rotation grinding method (1st report). Bulletin of the Japan Society of Precision Engineering 22 4 (1988) 295-300
41. ASTM, Standard test method for measuring warp and total thickness variation on silicon wafers by noncontact scanning, ASTM F 657-92, ASTM, West Conshohocken, PA.
42. M. Nishiguchi, N. Gotoh, Apparatus for grinding semiconductor wafer, US Patent 5113622, 1992.
43. Pei Z.J., and Strasbaugh A. Fine grinding of silicon wafers. International Journal of Machine Tools and Manufacture 41 5 (2001) 659-672
44. M. Nanjo, Disco Corporation, personal communication, February 2008.
45. J. Ikeda, T. Sasakura, Y. Yoshimura, K. Ueda, Double side grinding apparatus for plate disklike work, US Patent 5989108, 1999.
46. T. Kato, S. Okuni, S. Ikeda, K. Okabe, H. Oshima, Semiconductor wafer and production method thereof, US Patent 6491836, 2002.
47. S. Ikeda, S. Okuni, T. Kato, Double-sided simultaneous grinding method, double-sided simultaneous grinding machine, double-sided simultaneous lapping method, and double-sided simultaneous lapping machine, US Patent 6,652,358, 2003.
48. Pietsch G.J., and Kerstan M. Understanding simultaneous double disk grinding: operation principle and material removal kinematics in silicon wafer planarization. Precision Engineering 29 2 (2005) 189-196
49. S. Bhagavat, M. Bhagavat, R. Vandamme, T. Komura, Double side wafer grinder and methods for assessing workpiece nanotopology, US Patent Application Publication, US 2007/0179660 A1, August 2, 2007.
50. R. Vandamme, M. Bhagavat, Double side wafer grinder and methods for assessing workpiece nanotopology, US Patent Application Publication, US 2007/0179659 A1, August 2, 2007.
51. G.J. Pietsch, M. Kerstan, W. Blaha, Semiconductor wafer, apparatus and process for producing the semiconductor wafer, US Patent Application Publication, US 2005/0173377 A1, August 11, 2005.
52. Koyo Machine Industries Co., Ltd., Grinding machines for semiconductor wafers, retrieved from: 〈www.crystec.com/kmisemie.htm〉.
53. MEMC, Wafer size progression, retrieved from: 〈www.investors.memc.com/phoenix.zhtml?c=106680&p=irol-homeProfile&t=&id=&〉.
54. Heisel U., and Avroutine J. Process analysis for the evaluation of the surface formation and removal rate in lapping. Annals of the CIRP 50 1 (2001) 229-232
55. Dietrich H., Bergholz W., and Dubbert S. Three hundred-mm wafers: a technological and an economical challenge. Microelectronic Engineering 45 2-3 (1999) 183-190
56. Hahn P.O. The 300 mm silicon wafer-a cost and technology challenge. Microelectronic Engineering 56 1-2 (2001) 3-13
57. Pfitzner L., and Kucher P. A roadmap towards cost efficient 300 mm equipment. Materials Science in Semiconductor Processing 5 4-5 (2002) 321-331
58. SEMI, Standard for 3 inch polished monocrystalline silicon wafers, SEMI M1.2-89 (reapproved 0299), 1999.
59. SEMI, Standard for 100 μm polished monocrystalline silicon wafers (525 μm thickness), SEMI M1.5-89 (reapproved 0699), 1999.
60. SEMI, Standard for 125 μm polished monocrystalline silicon wafers, SEMI M1.7-89 (reapproved 0699), 1999.
61. SEMI, Standard for 150 μm polished monocrystalline silicon wafers, SEMI M1.8-0699, 1999.
62. SEMI, Standard for 200 μm polished monocrystalline silicon wafers (notched), SEMI M1.9-0699, 1999.
63. International 300 mm Initiative, Silicon test wafer specification for 180 nm technology, Technology Transfer # 97113407A-ENG, 1997.
64. Herring R.B. Silicon wafer technology-state of the art 1976. Solid State Technology 19 5 (1976) 37-54
65. Marinescu I.D., Shoutak A., and Spanu C.E. Technological assessment of double side lapping of silicon. Abrasives (December/January) (2002) 5-9
66. Brun J., and Cazcarra V. Lapping method to adapt the silicon wafer bow. IBM Technical Disclosure Bulletin 23 4 (1980) 1467-1469
67. Dudley J.A. Abrasive technology for wafer lapping. Microelectronic Manufacturing and Testing 4 4 (1986) 1-6
68. Wolf S., and Tauber R.N. Silicon Processing for the VLSI Era, vol. 1: Process Technology (2000), Lattice Press, Sunset Beach, CA
69. Pei Z.J., and Strasbaugh A. Fine grinding of silicon wafers: designed experiments. International Journal of Machine Tools and Manufacture 42 3 (2002) 395-404
70. Pei Z.J. A Study on surface grinding of 300 mm silicon wafers. International Journal of Machine Tools and Manufacture 42 3 (2002) 385-393
71. R.E. Steere, Wafering system, US Patent 4420909, 1981.
72. Buttner A. ID sawing-diameters increase. Industrial Diamond Review 45 2 (1985) 77-79
73. Tonshoff H.K., Karpuschewski B., Hartmann M., and Spengler C. Grinding-and-slicing technique as an advanced technology for silicon wafer slicing. Machining Science and Technology 1 1 (1997) 33-47
74. Brinksmeier E., and Schmeiden W.V. ID cut-off grinding of brittle materials. CIRP Annals 36 1 (1987) 219-222
75. Ge P.Q., Meng J.F., Chen J.H., and Zhang L.C. Precision slicing technology for single crystal silicon and relative basic research. Tool Engineering 39 (2005) 3-6 (in Chinese)
76. Moller H.J. Wafering of silicon crystals. Physica Status Solidi (A)-Applications and Materials 203 4 (2006) 659-669
77. Moller H.J. Basic mechanisms and models of multi-wire sawing. Advanced Engineering Materials 6 7 (2004) 501-513
78. Bhagavat S., and Kao I. Theoretical analysis on the effects of crystal anisotropy on wire sawing process and application to wafer slicing. International Journal of Machine Tools and Manufacture 46 5 (2006) 531-541
79. Yamada T., Fukunaga M., Ichikawa T., Furuno K., Makino K., and Yokoyama A. Prediction of warping in silicon wafer slicing with wire saw machine. Theoretical and Applied Mechanics 51 (2002) 251-258
80. Pei Z.J., Fisher G.R., Bhagavat M., and Kassir S. A grinding-based manufacturing method for silicon wafers: an experimental investigation. International Journal of Machine Tools and Manufacture 45 10 (2005) 1140-1151
81. T. Kato, S. Ookuni, Method and device for flat surface of thin plate-like work, Japanese Patent JP9248758, 1997.
82. N. Yasunaga, M. Takashina, T. Itoh, Development of sequential grinding-polishing process applicable to large-size Si wafer finishing, in: Proceedings of the First International Symposium on Advances in Abrasive Technology (ISAAT'1997), Sydney, Australia, July 8-10, 1997, pp. 96-100.
83. S.M. Kassir, T.A. Walsh, Grinding process and apparatus for planarizing sawed wafers, US Patent 5964646, 1999.
84. Liu W.J., Pei Z.J., and Xin X.J. Finite element analysis for grinding and lapping of wire-sawn silicon wafers. Journal of Materials Processing Technology 129 1-3 (2002) 2-9
85. Pei Z.J., Xin X.J., and Liu W. Finite element analysis for grinding of wire-sawn silicon wafers: a designed experiment. International Journal of Machine Tools and Manufacture 43 1 (2003) 7-16
86. Sun X.K., Pei Z.J., Xin X.J., and Fouts M. Waviness removal in grinding of wire-sawn silicon wafers: 3D finite element analysis with designed experiments. International Journal of Machine Tools and Manufacture 44 1 (2004) 11-19
87. Xin X.J., Pei Z.J., and Liu W.J. Finite element analysis on soft-pad grinding of wire-sawn silicon wafers. Journal of Electronic Packaging 126 2 (2004) 177-185
88. Pei Z.J., Kassir S., Bhagavat M., and Fisher G.R. An experimental investigation into soft-pad grinding of wire-sawn silicon wafers. International Journal of Machine Tools and Manufacture 44 2-3 (2004) 297-304
89. T. Kato, H. Masumura, S. Okuni, H. Kudo, Method of manufacturing semiconductor wafers, US Patent 5942445, 1999.
90. G.J. Pietsch, M. Kerstan, Simultaneous double-disk grinding machining process for flat, low-damage and material-saving silicon wafer substrate manufacturing, in: Proceedings of the Second Euspen International Conference, Turin, Italy, May 27-31, 2001, pp. 644-648.
91. Zhang X.H., Pei Z.J., Esayanur M., Bowers G.L., and Fisher G.R. An experimental investigation of material removal rate in polishing of silicon wafers. Transactions of the North American Manufacturing Research Institution of SME 35 (2007) 17-24
92. Steigerwald J.M., Murarka S.P., and Gutmann R.J. Chemical Mechanical Planarization of Microelectronic Materials (1997), Wiley, New York
93. Strasbaugh, nFinity 200 mm wax-mount polisher: single wafer, wax mount silicon prime wafer polishing equipment for higher yields, retrieved from: 〈www.strasbaugh.com/cm/Products/Prime%20Wafer%20Polishing/nFINITY%20200MM%20WAX-MOUNT%20POLISHER.html〉.
94. SpeedFam, Single side polisher/lapper, retrieved from: 〈http://www.speedfam.com/en/product02.html〉.
95. Wenski G., Altmann T., Winkler W., Heier G., and Holker G. Double side polishing-a technology mandatory for 300 mm wafer manufacturing. Materials Science in Semiconductor Processing 5 4-5 (2002) 375-380
96. Peter Wolters, AC 2000-P2: the new generation in 200 and 300 mm prime wafer DSP, retrieved from: 〈http://www.peter-wolters.com/eng/solmachine/downloads/ac2000-p2.pdf〉.
97. SpeedFam, Double side polisher/lapper, retrieved from: 〈http://www.speedfam.com/en/product03.html〉.
98. Pei Z.J., Fisher G.R., and Strasbaugh A. Fine grinding of silicon wafer: benefits and technical barriers. Transactions of the North American Manufacturing Research Institution of SME 32 (2004) 479-486
99. Pei Z.J., Billingsley S.R., and Miura S. Grinding induced subsurface cracks in silicon wafers. International Journal of Machine Tools and Manufacture 39 (1999) 1103-1116
100. Carlisle K., and Stocker M.A. Cost-effective machining of brittle materials (glasses and ceramics) eliminating/minimizing the polishing process. Proceedings of the International Society for Optical Engineering 3099 (1997) 46-58
101. Disco, Product information: Grinding wheels: IF series: Etched wafer grinding (for wafer manufacturers), retrieved from: 〈http://www.disco.co.jp/eg/products/grinding_wheel/if.html〉.
102. Asahi Diamond Industrial Website 〈http://www.asahidia.co.jp〉.
103. Disco Website 〈http://www.disco.co.jp〉.
104. Fujimi Website 〈http://www.fujimico.com〉.
105. Saint-Gobain Abrasives Website 〈http://www.nortonabrasives.com〉.
106. Shinhan Diamond Industrial Website 〈http://www.shinhandia.com〉.
107. Ohmori H., and Nakagawa T. Mirror surface grinding of silicon wafers with electrolytic in-process dressing. Annals of CIRP 39 1 (1990) 329-332