Fine grinding of silicon wafer: Benefits and technical barriers

Transactions of the North American Manufacturing Research Institute of SME

Volumn 32, Issue , 2004, Pages 479-486

  Pei, Z J ^a   Fisher, Graham R ^b   Strasbaugh, Alan ^c  

^a Sunflower Networking Group   (United States)

^b MEMC Electronic Materials Inc   (United States)

^c Strasbaugh Inc   (United States)

Author keywords

Grinding; Machining; Semiconductor material; Silicon wafer; Subsurface damage

Indexed keywords

CHAMFERING; ROUGH POLISHING; SUBSURFACE DAMAGE;

CRACK INITIATION; DEFORMATION; ETCHING; GRINDING (MACHINING); INTEGRATED CIRCUITS; MATHEMATICAL MODELS; POLISHING; SEMICONDUCTOR DEVICE MANUFACTURE; SURFACE ROUGHNESS;

SILICON WAFERS;

EID: 10044261909     PISSN: 10473025     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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