The 300 mm silicon wafer - A cost and technology challenge

Microelectronic Engineering

Volumn 56, Issue 1-2, 2001, Pages 3-13

  Hahn, Peter O ^a  

^a SILTRONIC AG   (Germany)

Author keywords

Silicon wafers

Indexed keywords

COSTS; TECHNOLOGY TRANSFER;

TECHNOLOGY CHALLENGES;

SILICON WAFERS;

EID: 0035342003     PISSN: 01679317     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0167-9317(00)00499-8     Document Type: Article

References (5)

1. H.R. Huff, R.K. Goodall, R.H. Nilson, K. Griffiths, in: Symposium Proceedings ULSI/97, 191st Meeting ECS, May 4-9, 1997.
2. P.O. Hahn, H.G. Fußstetter, Productronica 95, Munich Proceedings in Semiconductor Equipment and Materials Beyond JESSI -300 mm and Single Wafer Processing.
3. Dataquest, May 22, 1995, The move toward 300 mm wafers: the issues surrounding - when and how - money will talk.
4. P.O. Hahn, H.G. Fußstetter, Future Fab International, vol. 9, pp. 183-187.
5. H. Dietrich, F. Bialas, N. Caspary, in: SEMI 2000 European IEEE/SEMI Semiconductor Manufacturing Conference, Munich, 2000.