Test set embedding for deterministic BIST using a reconfigurable interconnection network

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 23, Issue 9, 2004, Pages 1289-1305

  Li, Lei ^a   Chakrabarty, Krishnendu ^a  

^a Duke University   (United States)

Author keywords

Embedded core testing; System on a chip (SoC) testing; Test application time; Test data volume

Indexed keywords

COMPUTER ARCHITECTURE; COMPUTER SIMULATION; DATA COMPRESSION; DECODING; ENCODING (SYMBOLS); PHASE SHIFTERS; SHIFT REGISTERS;

EMBEDDED CORE TESTING; SYSTEM-ON-CHIP (SOC) TESTING; TEST APPLICATION TIME; TEST-DATA VOLUME;

INTEGRATED CIRCUITS;

EID: 4444237933     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCAD.2004.831593     Document Type: Article

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