RESPIN++ - Deterministic embedded test

Proceedings of the European Test Workshop

Volumn 2002-January, Issue , 2002, Pages 37-44

  Schäfer, Lars ^a   Dorsch, Rainer ^a   Wunderlich, Hans Joachim ^a  

^a UNIVERSITY OF STUTTGART   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; INTEGRATED CIRCUITS; SEQUENTIAL CIRCUITS; SYSTEM-ON-CHIP;

COMPLETE SYSTEM; COMPRESSION ALGORITHMS; CRITICAL PATHS; EMBEDDED TESTS; SYSTEM ON A CHIP; TEST APPLICATION TIME; TEST ARCHITECTURE; TEST-DATA VOLUME;

INTEGRATED CIRCUIT TESTING;

EID: 84931427944     PISSN: 15301877     EISSN: 15581780     Source Type: Journal    
DOI: 10.1109/ETW.2002.1029637     Document Type: Article

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