Deterministic BIST with multiple scan chains

IEEE International Test Conference (TC)

Volumn , Issue , 1998, Pages 1057-1064

  Kiefer, Gundolf ^a   Wunderlich, Hans Joachim ^a  

^a UNIVERSITY OF STUTTGART   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

DETERMINISTIC SCAN-BASED BUILT-IN SELF TEST (BIST); MULTIPLE SCAN CHAINS;

ELECTRIC FAULT CURRENTS; INTEGRATED CIRCUIT TESTING; MICROPROCESSOR CHIPS;

BUILT-IN SELF TEST;

EID: 0032313716     PISSN: 10893539     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/TEST.1998.743304     Document Type: Conference Paper

References (26)