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Volumn , Issue , 1996, Pages 167-175
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Altering a pseudo-random bit sequence for scan-based BIST
a a |
Author keywords
[No Author keywords available]
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Indexed keywords
ELECTRIC FAULT CURRENTS;
LOGIC CIRCUITS;
LOGIC DESIGN;
SHIFT REGISTERS;
BUILT IN SELF TEST (BIST);
EMBEDDED SYSTEMS;
LINEAR FEEDBACK SHIFT REGISTER (LFSR);
INTEGRATED CIRCUIT TESTING;
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EID: 0030388310
PISSN: 10893539
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (147)
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References (21)
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