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Volumn , Issue , 2002, Pages 387-393

Reducing test application time through test data mutation encoding

Author keywords

[No Author keywords available]

Indexed keywords

BENCHMARK CIRCUIT; COMPRESSION ALGORITHMS; CURRENT TEST; SCAN-BASED DESIGNS; SEARCH ALGORITHMS; TEST APPLICATION TIME; TEST DATA; TEST VECTORS;

EID: 84893782556     PISSN: 15301591     EISSN: None     Source Type: Journal    
DOI: 10.1109/DATE.2002.998303     Document Type: Article
Times cited : (67)

References (10)
  • 1
    • 0034848095 scopus 로고    scopus 로고
    • Test volume and application time reduction through scan chain concealment
    • I. Bayraktaroglu and A. Orailoglu. Test volume and application time reduction through scan chain concealment. In Proc. of Design Automation Conference, pages 151-155, 2001.
    • (2001) Proc. Of Design Automation Conference , pp. 151-155
    • Bayraktaroglu, I.1    Orailoglu, A.2
  • 4
    • 0016452003 scopus 로고
    • A simplified loop-free algorithm for generating permutations
    • N. Dershowitz. A simplified loop-free algorithm for generating permutations. BIT, I5(1975):158-164.
    • (1975) BIT , vol.15 , pp. 158-164
    • Dershowitz, N.1
  • 5
    • 0000881136 scopus 로고
    • A survey of full length nonlinear shift register cycle algorithms
    • H. Fredricksen. A survey of full length nonlinear shift register cycle algorithms. SIAM Review, 24(2):195-221, 1982.
    • (1982) SIAM Review , vol.24 , Issue.2 , pp. 195-221
    • Fredricksen, H.1
  • 7
    • 0032682922 scopus 로고    scopus 로고
    • Scan vector compression/decompression using statisitical coding
    • A. Jas, J. Gosh-Dastidar, and N. Touba. Scan vector compression/ decompression using statisitical coding. In Proc. of VLSI Test Symposium, pages 25-29, 1999.
    • (1999) Proc. Of VLSI Test Symposium , pp. 25-29
    • Jas, A.1    Gosh-Dastidar, J.2    Touba, N.3
  • 8
    • 0032318126 scopus 로고    scopus 로고
    • Test vector decompression via cyclical scan chains and its application to testing corebased design
    • A. Jas and N. Touba. Test vector decompression via cyclical scan chains and its application to testing corebased design. In Proc. International Test Conference, pages 458-464, 1998.
    • (1998) Proc. International Test Conference , pp. 458-464
    • Jas, A.1    Touba, N.2
  • 9
    • 0033740888 scopus 로고    scopus 로고
    • Virtual scan chains: A means for reducing scan length in cores
    • A. Jas and N. Touba. Virtual scan chains: A means for reducing scan length in cores. In Proc. of VLSI Test Symposium, pages 73-78, 2000.
    • (2000) Proc. Of VLSI Test Symposium , pp. 73-78
    • Jas, A.1    Touba, N.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.