Variability in nanometer CMOS: Impact, analysis, and minimization

Integration, the VLSI Journal

Volumn 41, Issue 3, 2008, Pages 319-339

  Sylvester, Dennis ^a   Agarwal, Kanak ^b   Shah, Saumil ^a  

^a UNIVERSITY OF MICHIGAN   (United States)

^b IBM AUSTIN RESEARCH LABORATORY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED DESIGN; INTEGRATED CIRCUIT MANUFACTURE; LITHOGRAPHY; NETWORKS (CIRCUITS); OPTIMIZATION;

CIRCUIT DESIGN; NANOMETER;

CMOS INTEGRATED CIRCUITS;

EID: 43149107913     PISSN: 01679260     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.vlsi.2007.09.001     Document Type: Article

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