Statistical interconnect metrics for physical-design optimization

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 25, Issue 7, 2006, Pages 1273-1288

  Agarwal, Kanak ^a,b,d   Agarwal, Mridul ^a,c   Sylvester, Dennis ^a,b,e   Blaauw, David ^a,b  

^a IEEE   (United States)

^b UNIVERSITY OF MICHIGAN   (United States)

^c INDIAN INSTITUTE OF TECHNOLOGY KANPUR   (India)

^d IBM AUSTIN RESEARCH LABORATORY   (United States)

^e AMERICAN SOCIETY FOR ENGINEERING EDUCATION   (United States)

Author keywords

Coupling; Crosstalk noise; Delay metric; Integrated circuit interconnect; Process variation; RC trees; Slew; Statistical modeling; Timing analysis

Indexed keywords

CROSSTALK NOISE; DELAY METRIC; INTEGRATED CIRCUIT INTERCONNECT; PROCESS VARIATION; RC TREES; SLEW; STATISTICAL MODELING; TIMING ANALYSIS;

COMPUTER SIMULATION; CROSSTALK; MONTE CARLO METHODS; OPTIMIZATION; PROBABILITY DENSITY FUNCTION; STATISTICAL METHODS; VARIATIONAL TECHNIQUES;

INTERCONNECTION NETWORKS;

EID: 33744729673     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCAD.2005.855954     Document Type: Article

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