Implications of fundamental threshold voltage variations for high-density SRAM and logic circuits

Digest of Technical Papers - Symposium on VLSI Technology

Volumn , Issue , 1994, Pages 15-16

  Burnett, David ^a   Erington, Kent ^a   Subramanian, Chitra ^a   Baker, Kelly ^a  

^a MOTOROLA INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; DOPING (ADDITIVES); LOGIC CIRCUITS; MOSFET DEVICES; RANDOM ACCESS STORAGE; STABILITY; VOLTAGE MEASUREMENT;

POISSON DISTRIBUTION; SCALING; THRESHOLD VOLTAGE EFFECTS;

ELECTRIC NETWORK ANALYSIS;

EID: 0028571338     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)