Fault tolerance and reliability in field-programmable gate arrays

IET Computers and Digital Techniques

Volumn 4, Issue 3, 2010, Pages 196-210

  Stott, E ^a   Sedcole, P ^a   Cheung, P ^a  

^a IMPERIAL COLLEGE LONDON   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

DEVICE DEGRADATION; IN-FIELD; RUNTIMES; WITHIN-DIE PROCESS;

DEGRADATION; FAULT DETECTION; LOGIC GATES; MICROPROCESSOR CHIPS; QUALITY ASSURANCE;

FAULT TOLERANCE;

EID: 77953344025     PISSN: 17518601     EISSN: None     Source Type: Journal    
DOI: 10.1049/iet-cdt.2009.0011     Document Type: Article

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