Diagnosis of interconnect faults in cluster-based FPGA architectures

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD

Volumn 2000-January, Issue , 2000, Pages 472-475

  Harris, Ian ^a   Tessier, Russell ^a  

^a University of Massachusetts   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CLUSTER COMPUTING; COMPUTER AIDED DESIGN; APPLICATION SPECIFIC INTEGRATED CIRCUITS; COMPUTER ARCHITECTURE; FAILURE ANALYSIS; MATRIX ALGEBRA;

DIAGNOSTIC RESOLUTION; DISTINGUISHING CONDITIONS; FPGA ARCHITECTURES; FPGA CONFIGURATION; HIERARCHICAL APPROACH; HIGH DENSITY INTERCONNECTS; INTERCONNECT FAULTS; TEST CONFIGURATIONS;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA); FIELD PROGRAMMABLE GATE ARRAYS;

INTERCONNECT FAULTS; PROGRAMMABLE INTERCONNECT POINTS;

EID: 0034478157     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCAD.2000.896517     Document Type: Conference Paper

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