BIST-based delay-fault testing in FPGAs

Journal of Electronic Testing: Theory and Applications (JETTA)

Volumn 19, Issue 5, 2003, Pages 549-558

  Abramovici, Miron ^a   Stroud, Charles E ^b  

^a DAFCA   (United States)

^b AUBURN UNIVERSITY   (United States)

Author keywords

Built in self test; Delay faults; Field programmable gate arrays

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; FIELD PROGRAMMABLE GATE ARRAYS; FLIP FLOP CIRCUITS; INTEGRATED CIRCUIT MANUFACTURE; RANDOM ACCESS STORAGE; TABLE LOOKUP; VLSI CIRCUITS;

DELAY FAULT TESTING; ON-LINE TESTING; PROGRAMMABLE LOGIC BLOCKS;

BUILT-IN SELF TEST;

EID: 0141519082     PISSN: 09238174     EISSN: None     Source Type: Journal    
DOI: 10.1023/A:1025126030727     Document Type: Article

References (20)

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