Fault detection and fault diagnosis techniques for lookup table FPGAs

VLSI Design

Volumn 15, Issue 1, 2002, Pages 397-406

  Lu, Shyue Kung ^a   Yeh, Fu Min ^b   Shih, Jen Sheng ^a  

^a FU JEN CATHOLIC UNIVERSITY   (Taiwan)

^b CHUNG SHAN INSTITUTE OF SCIENCE AND TECHNOLOGY   (Taiwan)

Author keywords

Bijective; C diagnosable; CLB; Diagnosis; FPGA; Testing

Indexed keywords

BUILT-IN SELF TEST; COMBINATORIAL CIRCUITS; COMPUTATIONAL COMPLEXITY; FAILURE ANALYSIS; FLIP FLOP CIRCUITS; INTERCONNECTION NETWORKS; TABLE LOOKUP; THEOREM PROVING;

CONFIGURABLE LOGIC BLOCK; FAULT DIAGNOSTIC TECHNIQUE; ONE-DIMENSIONAL ARRAY; OUTPUT RESPONSE ANALYSIS; TEST PATTERN GENERATION;

FIELD PROGRAMMABLE GATE ARRAYS;

EID: 0036704640     PISSN: 1065514X     EISSN: None     Source Type: Journal    
DOI: 10.1080/1065514021000012011     Document Type: Article

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