Exploring FPGA structures for evolving fault tolerant hardware

Proceedings - NASA/DoD Conference on Evolvable Hardware, EH

Volumn 2003-January, Issue , 2003, Pages 174-181

  Shanthi, A P ^a   Parthasarathi, R ^a  

^a ANNA UNIVERSITY   (India)

Author keywords

Circuit faults; Digital circuits; Evolution (biology); Fault tolerance; Fault tolerant systems; Field programmable gate arrays; Genetics; Hardware; Programmable logic arrays; Redundancy

Indexed keywords

BIOLOGY; COMPUTER HARDWARE; DIGITAL CIRCUITS; ELECTRIC NETWORK ANALYSIS; FAULT TOLERANCE; GENETIC ALGORITHMS; LOGIC GATES; NASA; REDUNDANCY; SIGNAL RECEIVERS;

CIRCUIT FAULTS; EVOLUTION BIOLOGY; FAULT TOLERANT SYSTEMS; GENETICS; PROGRAMMABLE LOGIC ARRAY;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

EID: 33645971243     PISSN: 15506029     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/EH.2003.1217664     Document Type: Conference Paper

References (16)

1. X. Yao and T. Higuchi, "Promises and Challenges of Evolvable Hardware", International Conference on Evolvable Systems: From Biology to Hardware, Lecture Notes in Computer Science, 1062, Springer Verlag, 1996, pp. 55-78.
2. D. Keymeulen, R. S. Zebulum, Y. Jin and A. Stoica, "Fault-Tolerant Evolvable Hardware Using Field-Programmable Transistor Arrays", IEEE Transactions on Reliability, Vol.49, No.3, September 2000.
3. R. O. Canham and A. M. Tyrrell, "Evolved Fault Tolerance in Evolvable Hardware", IEEE Congress on Evolutionary Computation, 2002, Honolulu, Hawaii, 2002.
4. A. Thompson, "Evolving Fault Tolerant Systems" in Proceedings of 1st IEE/IEEE Intl Conference on Genetic Algorithms in Engineering Systems, IEE Conf. Pub. No 414, 1995, pp. 524-529.
5. D. W. Bradley, A. M. Tyrrell, "A Hardware Immune System for Benchmark State Machine Error Detection", Proceedings of the Congress on Evolutionary Computation 2002(CEC2002), Honolulu, Hawaii, 2002.
6. th International Conference on Military and Aerospace Applications of Programmable Devices and Technologies (MAPLD 02), 2002.
7. th Asia - Pacific Conference on Simulated Evolution and Learning (SEAL 02) vol. 2, Nov. 2002,pp. 845-849.
8. A.P.Shanthi, Balaji Vijayan, Manivel Rajendran, Senthilkumar Veluswami and Ranjani Parthasarathi, "GA Based On-line Testing and Recovery for Critical Digital Systems", In Suthikshn Kumar, editor, HiPC 2002 Workshop on Soft Computing (WoSCo'02), Proc. Innovative Applications of Soft Computing, Dec. 2002, pp. 81-89.
9. J. F. Miller, "Evolution of Digital Filters Using a Gate Array Model", In Poli et al., editor, Evolutionary Image Analysis, Signal Processing and Telecommunications, Volume 1596 of LNCS, Springer, 1999, pp. 17-30,.
10. M. Murakawa, S. Yoshizawa, I. Kajitani, T. Furuya, M. Iwata and T. Higuchi, "Hardware Evolution at Functional Level", International Conference on Evolutionary Computation: The 4th Conference on Parallel Problem Solving from Nature, 1996, pp. 62-71.
11. Delon Levi and Steven A. Guccione, "GeneticFPGA: A Java-based Tool for Evolving Stable Circuits", In John Schewel, et.al., editors, Reconfigurable Technology: FPGAs for Computing and Applications, Proc. SPIE 3844, Bellingham, WA, September 1999, pp. 114-121.
12. Atmel Corporation, www.atmel.com
13. Xilinx Inc., www.xilinx.com
14. Altera Products, www.altera.com
15. A.P.Shanthi, Balaji Vijayan, Manivel Rajendran, Senthilkumar Veluswami and Ranjani Parthasarathi, " Genetic Learning Based Fault Tolerant Cover for Digital Systems", Sasikumar M, et al., Knowledge Based Computer Systems (KBCS 2002), Proc. Artificial Intelligence: Theory and Practice, Vikas Publishers, Dec. 2002, pp. 149-159.
16. Jim Torresen, "A Divide-and-Conquer Approach to Evolvable Hardware", Second International Conference on Evolvable Hardware (ICES98), September 1998, Lausanne, Switzerland.