Novel technique for built-in self-test of FPGA interconnects

IEEE International Test Conference (TC)

Volumn , Issue , 2000, Pages 795-803

  Sun, Xiaoling ^a   Xu, Jian ^a   Chan, Ben ^a   Trouborst, Pieter ^b  

^a UNIVERSITY OF ALBERTA   (Canada)

^b NORTEL NETWORKS   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

ERROR CORRECTION; FIELD PROGRAMMABLE GATE ARRAYS; FLIP FLOP CIRCUITS; INTEGRATED CIRCUIT TESTING; MULTIPLEXING EQUIPMENT; NAND CIRCUITS; STATIC RANDOM ACCESS STORAGE;

CONFIGURATION LOGIC BLOCKS; ERROR CONTROL CODING; INPUT-OUTPUT BLOCKS;

BUILT-IN SELF TEST;

EID: 0034476395     PISSN: 10893539     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

References (13)