Effect of the interfacial SiO2 layer in high-k HfO2 gate stacks on NBTI

IEEE Transactions on Device and Materials Reliability

Volumn 8, Issue 1, 2008, Pages 47-60

  Neugroschel, Arnost ^a,b   Bersuker, Gennadi ^a,c   Choi, Rino ^a,c,d   Lee, Byoung Hun ^a,c  

^a IEEE

^b University of Florida   (United States)

^c SEMATECH   (United States)

^d Inha University   (South Korea)

Author keywords

High k; Interface traps; Metal oxide semiconductor (MOS) devices; Negative bias temperature instability (NBTI); Oxide traps

Indexed keywords

CURRENT VOLTAGE CHARACTERISTICS; GATES (TRANSISTOR); HAFNIUM COMPOUNDS; MOS DEVICES; TEMPERATURE MEASUREMENT; VOLTAGE MEASUREMENT;

BULK OXIDE CHARGES; GATE STACKS; NEGATIVE BIAS TEMPERATURE INSTABILITY (NBTI); OXIDE TRAPS;

SILICA;

EID: 40549119537     PISSN: 15304388     EISSN: 15304388     Source Type: Journal    
DOI: 10.1109/TDMR.2008.916294     Document Type: Article

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